eugene-tarassov / vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
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Why are we not using the DDR ram on the NexsysA7 board for RISCV #254

Open photonlinux opened 2 weeks ago

photonlinux commented 2 weeks ago

Eugene, thank for all your work with the vivado-riscv. That is excellent work.

Hopefuly not a stupid question but my NexsysA7 shows up with 83MB of memory but we have DDR on that board. Did I make a mistake generating the image etc.

Thanks for all the work again.

Regards Laurence

eugene-tarassov commented 1 week ago

Nexsys A7 has only 128MB of DDR RAM. So, 83MB is about right amount of free memory after Linux boot.

photonlinux commented 1 week ago

Thanks, for some reason had the DDR at 256M not 128M Turned out to be a dumb question, Apologies