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eugenelepekhin / LogicCircuit

LogicCircuit – is free, open source educational software for designing and simulating digital logic circuits.
https://logiccircuit.org/
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error in the RS latch #14

Closed ProjectCF closed 8 months ago

ProjectCF commented 9 months ago

I'm writing a 16-bit CPU(why this software forces little-endian? it makes me have to use a TZ16 to process it) register F jumps by 2 instead of 1 the bug is in the circuit "RS" in "D" in"D4" in "D16" in "REGS" in "CPU" in "Main" at first image then image at last image why? there're just two nor gates

ProjectCF commented 9 months ago

16.zip

eugenelepekhin commented 9 months ago

Your RS flip-flop is not edge synchronized. So, any changes in the outside circuits will cause changes in it's state. With big circuits it is hard to figure out what is wrong. So, I suggest to first build and test edge triggered flip-flop, and then use it in your circuitry. The software does not force any endian, you probably built it that way. I don't know what is TZ16. For sample flip-flops you can use sample project from https://logiccircuit.org/ or search forums there. This space is for bugs in software, not for issues with schematics.

ProjectCF commented 9 months ago

ok TZ16 is reversing bits(debugger treats bit0 as LSB but my project treats bit0 as MSB)

ProjectCF commented 9 months ago

and how to build an edge synchronized edge triggered D flip-flop with clr? image RS is only used in this

ProjectCF commented 9 months ago

the actual bug is current output=0 s is set to 1 current output=1 s is set to 0 1cycle later current output=1 but there are no changes image image image image

eugenelepekhin commented 9 months ago

It's a lot of information about it on the web. For example look here: https://lambdageeks.com/master-slave-flip-flop/ You can start with JK flip flop and then build D flip flop from JK. About the bug - I am sure you are getting more changes in the input than you think. If you double click the probe, you will see entire history of changes.

eugenelepekhin commented 8 months ago

this is not a bug, but question.