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Patch Status 35920-RFC_treeifconv_Handle_nonzero_masked_elements_PR115336-1 #1851

Closed github-actions[bot] closed 1 day ago

github-actions[bot] commented 2 months ago

Precommit CI Run information

Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/9808428059

Patch information

Applied patches: 1 -> 1 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=35920 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/7ea24dfc-34dd-4931-8614-6fd0ef86972a@gmail.com/ Patch id: 93421

Build Targets

Some targets are built as multilibs. If a build target ends with multilib, please refer to the table below to see all the targets within that multilib. Target name -march string
newlib-rv64gc-lp64d-multilib rv32gc-ilp32d, rv64gc-lp64d
newlib-rv64gcv-lp64d-multilib rv64gcv-lp64d
linux-rv64gcv-lp64d-multilib rv32gcv-ilp32d, rv64gcv-lp64d

Target Information

Target Shorthand -march string
Bitmanip gc_zba_zbb_zbc_zbs

Notes

Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com

github-actions[bot] commented 2 months ago

Lint Status

Lint passed

github-actions[bot] commented 2 months ago

Apply Status

Target Status
Baseline hash: https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294 Applied
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/23a0935262d6817097406578b1c70563f424804b Applied

Git log

git log --oneline from the most recently applied patch to the baseline

> git log --oneline 304b6464e0ba3536e986f3464dfb4bcfcbefa294^..HEAD
fcc7b94e644 tree-if-conv: Handle nonzero masked elements [PR115336].
304b6464e0b Daily bump.

Notes

Patch applied successfully

Additional information

github-actions[bot] commented 2 months ago

Build GCC Status

Target Status
newlib-rv32imc_zba_zbb_zbc_zbs-ilp32d-non-multilib Success
newlib-rv64gc-lp64d-multilib Success
linux-rv64gcv-lp64d-multilib Success
linux-rv32gc_zba_zbb_zbc_zbs-ilp32d-non-multilib Success
newlib-rv64gcv-lp64d-multilib Success
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-non-multilib Success

Notes

Patch(es) were applied to the hash https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294. If this patch commit depends on or conflicts with a recently committed patch, then these results may be outdated.

Additional information

github-actions[bot] commented 2 months ago

Testsuite Status

Summary

New Failures gcc g++ gfortran Previous Hash
linux: rv32 Bitmanip ilp32d medlow 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv32gcv ilp32d medlow multilib 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv64 Bitmanip lp64d medlow 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv64gcv lp64d medlow multilib 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv32gc ilp32d medlow multilib 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv64gc lp64d medlow multilib 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv64gcv lp64d medlow multilib 784/69 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
Resolved Failures gcc g++ gfortran Previous Hash
linux: rv32 Bitmanip ilp32d medlow 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv32gcv ilp32d medlow multilib 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv64 Bitmanip lp64d medlow 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv64gcv lp64d medlow multilib 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv32gc ilp32d medlow multilib 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv64gc lp64d medlow multilib 50/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv64gcv lp64d medlow multilib 51/4 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
Unresolved Failures gcc g++ gfortran Previous Hash
linux: rv32 Bitmanip ilp32d medlow 270/57 4/1 12/2 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv32gcv ilp32d medlow multilib 296/77 12/3 12/2 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv64 Bitmanip lp64d medlow 266/55 4/1 12/2 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
linux: rv64gcv lp64d medlow multilib 290/74 12/3 12/2 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv32gc ilp32d medlow multilib 301/63 37/6 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib 310/66 37/6 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv64gc lp64d medlow multilib 288/58 10/3 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294
newlib: rv64gcv lp64d medlow multilib 313/77 18/5 0/0 https://github.com/gcc-mirror/gcc/commit/304b6464e0ba3536e986f3464dfb4bcfcbefa294

New Failures Across All Affected Targets (8 targets / 8 total targets)

FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith-10.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-rv32-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-rv32-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-rv64-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-rv64-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-rv32-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-rv32-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-rv64-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-rv64-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_zvfh-rv32-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_zvfh-rv32-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_zvfh-rv64-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_zvfh-rv64-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-rv32-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-rv32-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-rv64-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-rv64-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-rv32-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-rv32-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-rv64-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-rv64-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c scan-assembler-not \\tvmerge\\.vvm
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv64gcv.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv64gcv.c scan-assembler-not \\tvmerge\\.vvm
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 14
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-3.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-4.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 3
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-5.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 3
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-6.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 3
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_fmul-5.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-1.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-3.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-4.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-5.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_mulh-1.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_mulh-2.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-1.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-2.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-3.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-2.c scan-assembler-times vsll\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 8
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-2.c scan-assembler-times vsra\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-2.c scan-assembler-times vsrl\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-3.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-3.c scan-assembler-times vsll\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 8
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-3.c scan-assembler-times vsra\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-3.c scan-assembler-times vsrl\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-4.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-4.c scan-assembler-times vsll\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 8
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-4.c scan-assembler-times vsra\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-4.c scan-assembler-times vsrl\\.vi\\s+v[0-9]+,v[0-9]+,3,v0.t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-5.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-7.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-8.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_shift-9.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c scan-assembler-not \\tvf?merge\\.v[vxi]m\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 4
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 6
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 6
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c scan-assembler-times \\tvf?merge\\.v[vxi]m\\t 6
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-1.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-2.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-4.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-5.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-6.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-7.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-8.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-9.c scan-assembler-not \\tvmerge\\.vvm\\t
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-11.c scan-assembler-not vlse64\\.v\\s+v[0-9]+,\\s*0\\([a-x0-9]+\\),\\s*zero
FAIL: gcc.target/riscv/rvv/autovec/partial/select_vl-2.c check-function-bodies foo
FAIL: gcc.target/riscv/rvv/autovec/pr110989.c -O3 -ftree-vectorize  scan-assembler-times vsetvli 3
FAIL: gcc.target/riscv/rvv/autovec/pr110989.c -O3 -ftree-vectorize  scan-assembler-times vsetvli\\s+zero,\\s*zero,\\s*e32,\\s*mf2,\\s*t[au],\\s*m[au] 1
FAIL: gcc.target/riscv/rvv/autovec/pr110989.c -O3 -ftree-vectorize  scan-assembler-times vsetvli\\s+zero,\\s*zero,\\s*e64,\\s*m1,\\s*t[au],\\s*m[au] 1
FAIL: gcc.target/riscv/rvv/autovec/pr115336.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.i\\s*v[0-9]+,0 3
FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_call-2.c scan-assembler-not vmerge
FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c scan-assembler-not vmerge

Resolved Failures Across All Affected Targets (8 targets / 8 total targets)

FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-2.c scan-assembler-times \\tvfwsub\\.vv 6
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-2.c scan-assembler-times \\tvwsubu\\.vv 9
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c scan-assembler-times \\tvfwmul\\.vv 8
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c scan-assembler-times \\tvwmulu\\.vv 12
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-8.c scan-assembler-times \\tvfwmsac\\.vv 8

Architecture Specific Resolved Failures

newlib rv64gcv lp64d medlow multilib:

FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c (test for excess errors)

Additional information