Patch Status 36277-committedGCC14_RISCV_Allow_adding_enabled_extension_via_target_arch_attributes-1

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Precommit CI Run information

Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/9956126422

Patch information

Applied patches: 1 -> 1 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=36277 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20240716111815.129028-5-christoph.muellner@vrull.eu/ Patch id: 93973

Build Targets

Some targets are built as multilibs. If a build target ends with multilib, please refer to the table below to see all the targets within that multilib.	Target name	-march string
newlib-rv64gc-lp64d-multilib	rv32gc-ilp32d, rv64gc-lp64d
newlib-rv64gcv-lp64d-multilib	rv64gcv-lp64d
linux-rv64gcv-lp64d-multilib	rv32gcv-ilp32d, rv64gcv-lp64d

Target Information

Target Shorthand	-march string
Bitmanip	gc_zba_zbb_zbc_zbs

Notes

Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com

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Lint Status

The following issues have been found with 36277-committedGCC14_RISCV_Allow_adding_enabled_extension_via_target_arch_attributes-1 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.

=== ERROR type #1: braces should be on a separate line (1 error(s)) ===
gcc/config/riscv/riscv-subset.h:112:37:  void set_allow_adding_dup (bool v) { m_allow_adding_dup = v; }

Additional information

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Apply Status

Target	Status
Baseline hash: https://github.com/gcc-mirror/gcc/commit/c6803cdaba7a7bf933e52cd36f901430253cc2b0	Failed
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/acd4ab8d6e8938d48e74ad04adf22ece280e35c0	Failed

Command

> git am ../patches/*.patch --whitespace=fix -q --3way --empty=drop

Output

error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
hint: When you have resolved this problem, run "git am --continue".
hint: If you prefer to skip this patch, run "git am --skip" instead.
hint: To restore the original branch and stop patching, run "git am --abort".
hint: Disable this message with "git config advice.mergeConflict false"
Patch failed at 0001 RISC-V: Allow adding enabled extension via target arch attributes
---
 gcc/common/config/riscv/riscv-common.cc       | 17 +++++++----
 gcc/config/riscv/riscv-subset.h               |  5 ++++
 gcc/config/riscv/riscv-target-attr.cc         |  3 ++
 gcc/testsuite/gcc.target/riscv/pr115554.c     |  2 --
 .../gcc.target/riscv/target-attr-16.c         | 28 +++++++++++++++++++
 5 files changed, 47 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-16.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 2257b959acb..5212f67faad 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -663,12 +663,17 @@ riscv_subset_list::add (const char *subset, int major_version,
      ext->minor_version = minor_version;
    }
       else
-   error_at (
-     m_loc,
-     "%<-march=%s%>: extension %qs appear more than one time",
-     m_arch,
-     subset);
-
+   {
+     /* The extension is already in the list.  */
+     if (!m_allow_adding_dup
+         || ext->major_version != major_version
+         || ext->minor_version != minor_version)
+       error_at (
+         m_loc,
+         "%<-march=%s%>: extension %qs appear more than one time",
+         m_arch,
+         subset);
+   }
       return;
     }
   else if (strlen (subset) == 1 && !standard_extensions_p (subset))
diff --git a/gcc/config/riscv/riscv-subset.h b/gcc/config/riscv/riscv-subset.h
index 256d2865746..c2d213c1734 100644
--- a/gcc/config/riscv/riscv-subset.h
+++ b/gcc/config/riscv/riscv-subset.h
@@ -62,6 +62,9 @@ private:
   /* X-len of m_arch. */
   unsigned m_xlen;

+  /* Allow adding the same extension more than once.  */
+  bool m_allow_adding_dup;
+
   riscv_subset_list (const char *, location_t);

   const char *parsing_subset_version (const char *, const char *, unsigned *,
@@ -106,6 +109,8 @@ public:

   void set_loc (location_t);

+  void set_allow_adding_dup (bool v) { m_allow_adding_dup = v; }
+
   void finalize ();
 };

diff --git a/gcc/config/riscv/riscv-target-attr.cc b/gcc/config/riscv/riscv-target-attr.cc
index b514e68bf40..1645a669217 100644
--- a/gcc/config/riscv/riscv-target-attr.cc
+++ b/gcc/config/riscv/riscv-target-attr.cc
@@ -110,6 +110,8 @@ riscv_target_attr_parser::parse_arch (const char *str)
              ? riscv_subset_list::parse (local_arch_str, m_loc)
              : riscv_cmdline_subset_list ()->clone ();
       m_subset_list->set_loc (m_loc);
+      m_subset_list->set_allow_adding_dup (true);
+
       while (token)
    {
      if (token[0] != '+')
@@ -135,6 +137,7 @@ riscv_target_attr_parser::parse_arch (const char *str)
      token = strtok_r (NULL, ",", &str_to_check);
    }

+      m_subset_list->set_allow_adding_dup (false);
       m_subset_list->finalize ();
       return true;
     }
diff --git a/gcc/testsuite/gcc.target/riscv/pr115554.c b/gcc/testsuite/gcc.target/riscv/pr115554.c
index e7dcde6276f..16d5f63aac0 100644
--- a/gcc/testsuite/gcc.target/riscv/pr115554.c
+++ b/gcc/testsuite/gcc.target/riscv/pr115554.c
@@ -9,5 +9,3 @@ extern
 __attribute__((target("arch=+zbb")))
 __attribute__((target("arch=+zbb")))
 void bar(void);
-
-/* { dg-error "extension 'zbb' appear more than one time" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/target-attr-16.c b/gcc/testsuite/gcc.target/riscv/target-attr-16.c
new file mode 100644
index 00000000000..81ef2d72792
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/target-attr-16.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zba" { target { rv32 } } } */
+/* { dg-options "-march=rv64gc_zba" { target { rv64 } } } */
+
+__attribute__((target("arch=+zba,+zbb")))
+void foo1 (void)
+{
+}
+
+__attribute__((target("arch=+zbb,+zbb")))
+void foo2 (void)
+{
+}
+
+__attribute__((target("arch=+zba")))
+__attribute__((target("arch=+zbb")))
+void foo (void)
+{
+}
+
+__attribute__((target("arch=+zbb")))
+__attribute__((target("arch=+zbb")))
+void bar (void)
+{
+}
+
+/* { dg-final { scan-assembler-times ".option arch, rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zba1p0_zbb1p0" 4 { target { rv32 } } } } */
+/* { dg-final { scan-assembler-times ".option arch, rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zba1p0_zbb1p0" 4 { target { rv64 } } } } */

Additional information