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1 month ago Lint Status
The following issues have been found with 36290-RISCV_Implement_initriscvfeaturesbits_riscvfeaturebits_and_riscvvendorfeaturebits-1 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.
=== ERROR type #1: blocks of 8 spaces should be replaced with tabs (3 error(s)) ===
libgcc/config/riscv/feature_bits.c:194:0:████████████████ : "=r"(a0)
libgcc/config/riscv/feature_bits.c:195:0:████████████████ : "r"(a7), "r"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a4)
libgcc/config/riscv/feature_bits.c:196:0:████████████████ : "memory");
=== ERROR type #2: braces should be on a separate line (2 error(s)) ===
libgcc/config/riscv/feature_bits.c:186:28: long arg4, long arg5) {
libgcc/config/riscv/feature_bits.c:289:35:void __init_riscv_features_bits () {
=== ERROR type #3: lines should not exceed 80 characters (1 error(s)) ===
libgcc/config/riscv/feature_bits.c:123:80:#define SET_EXT(EXT) __riscv_feature_bits.features[EXT##_GROUPID] |= EXT##_BITMASK
=== ERROR type #4: there should be exactly one space between function name and parenthesis (54 error(s)) ===
libgcc/config/riscv/feature_bits.c:30:36:} __riscv_feature_bits __attribute__((visibility("hidden"), nocommon));
libgcc/config/riscv/feature_bits.c:38:43:} __riscv_vendor_feature_bits __attribute__((visibility("hidden"), nocommon));
libgcc/config/riscv/feature_bits.c:185:26:static long syscall_5_args(long number, long arg1, long arg2, long arg3,
libgcc/config/riscv/feature_bits.c:187:26: register long a7 __asm__("a7") = number;
libgcc/config/riscv/feature_bits.c:188:26: register long a0 __asm__("a0") = arg1;
libgcc/config/riscv/feature_bits.c:189:26: register long a1 __asm__("a1") = arg2;
libgcc/config/riscv/feature_bits.c:190:26: register long a2 __asm__("a2") = arg3;
libgcc/config/riscv/feature_bits.c:191:26: register long a3 __asm__("a3") = arg4;
libgcc/config/riscv/feature_bits.c:192:26: register long a4 __asm__("a4") = arg5;
libgcc/config/riscv/feature_bits.c:193:22: __asm__ __volatile__("ecall\n\t"
libgcc/config/riscv/feature_bits.c:202:11: SET_EXT(EXT)
libgcc/config/riscv/feature_bits.c:205:18: SET_FROM_HWPROBE(hwprobe_ima_ext, EXT)
libgcc/config/riscv/feature_bits.c:216:13: sizeof(hwprobes) / sizeof(hwprobes[0]), 0,
libgcc/config/riscv/feature_bits.c:226:13: SET_EXT(I);
libgcc/config/riscv/feature_bits.c:227:13: SET_EXT(M);
libgcc/config/riscv/feature_bits.c:228:13: SET_EXT(A);
libgcc/config/riscv/feature_bits.c:240:13: SET_EXT(F);
libgcc/config/riscv/feature_bits.c:241:13: SET_EXT(D);
libgcc/config/riscv/feature_bits.c:245:11: SET_EXT(C);
libgcc/config/riscv/feature_bits.c:247:11: SET_EXT(V);
libgcc/config/riscv/feature_bits.c:249:18: SET_FROM_IMA_EXT(ZBA);
libgcc/config/riscv/feature_bits.c:250:18: SET_FROM_IMA_EXT(ZBB);
libgcc/config/riscv/feature_bits.c:251:18: SET_FROM_IMA_EXT(ZBS);
libgcc/config/riscv/feature_bits.c:252:18: SET_FROM_IMA_EXT(ZICBOZ);
libgcc/config/riscv/feature_bits.c:253:18: SET_FROM_IMA_EXT(ZBC);
libgcc/config/riscv/feature_bits.c:254:18: SET_FROM_IMA_EXT(ZBKB);
libgcc/config/riscv/feature_bits.c:255:18: SET_FROM_IMA_EXT(ZBKC);
libgcc/config/riscv/feature_bits.c:256:18: SET_FROM_IMA_EXT(ZBKX);
libgcc/config/riscv/feature_bits.c:257:18: SET_FROM_IMA_EXT(ZKND);
libgcc/config/riscv/feature_bits.c:258:18: SET_FROM_IMA_EXT(ZKNE);
libgcc/config/riscv/feature_bits.c:259:18: SET_FROM_IMA_EXT(ZKNH);
libgcc/config/riscv/feature_bits.c:260:18: SET_FROM_IMA_EXT(ZKSED);
libgcc/config/riscv/feature_bits.c:261:18: SET_FROM_IMA_EXT(ZKSH);
libgcc/config/riscv/feature_bits.c:262:18: SET_FROM_IMA_EXT(ZKT);
libgcc/config/riscv/feature_bits.c:263:18: SET_FROM_IMA_EXT(ZVBB);
libgcc/config/riscv/feature_bits.c:264:18: SET_FROM_IMA_EXT(ZVBC);
libgcc/config/riscv/feature_bits.c:265:18: SET_FROM_IMA_EXT(ZVKB);
libgcc/config/riscv/feature_bits.c:266:18: SET_FROM_IMA_EXT(ZVKG);
libgcc/config/riscv/feature_bits.c:267:18: SET_FROM_IMA_EXT(ZVKNED);
libgcc/config/riscv/feature_bits.c:268:18: SET_FROM_IMA_EXT(ZVKNHA);
libgcc/config/riscv/feature_bits.c:269:18: SET_FROM_IMA_EXT(ZVKNHB);
libgcc/config/riscv/feature_bits.c:270:18: SET_FROM_IMA_EXT(ZVKSED);
libgcc/config/riscv/feature_bits.c:271:18: SET_FROM_IMA_EXT(ZVKSH);
libgcc/config/riscv/feature_bits.c:272:18: SET_FROM_IMA_EXT(ZVKT);
libgcc/config/riscv/feature_bits.c:273:18: SET_FROM_IMA_EXT(ZFH);
libgcc/config/riscv/feature_bits.c:274:18: SET_FROM_IMA_EXT(ZFHMIN);
libgcc/config/riscv/feature_bits.c:275:18: SET_FROM_IMA_EXT(ZIHINTNTL);
libgcc/config/riscv/feature_bits.c:276:18: SET_FROM_IMA_EXT(ZIHINTPAUSE);
libgcc/config/riscv/feature_bits.c:277:18: SET_FROM_IMA_EXT(ZVFH);
libgcc/config/riscv/feature_bits.c:278:18: SET_FROM_IMA_EXT(ZVFHMIN);
libgcc/config/riscv/feature_bits.c:279:18: SET_FROM_IMA_EXT(ZFA);
libgcc/config/riscv/feature_bits.c:280:18: SET_FROM_IMA_EXT(ZTSO);
libgcc/config/riscv/feature_bits.c:281:18: SET_FROM_IMA_EXT(ZACAS);
libgcc/config/riscv/feature_bits.c:282:18: SET_FROM_IMA_EXT(ZICOND);
Precommit CI Run information
Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/9959611004
Patch information
Applied patches: 1 -> 1 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=36290 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20240716144913.3972779-1-kito.cheng@sifive.com/ Patch id: 93992
Build Targets
multilib, please refer to the table below to see all the targets within that multilib.-marchstringrv32gc-ilp32d,rv64gc-lp64drv64gcv-lp64drv32gcv-ilp32d,rv64gcv-lp64dTarget Information
-marchstringgc_zba_zbb_zbc_zbsNotes
Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com