github-actions[bot] commented 1 month ago

Precommit CI Run information

Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/10238548951

Patch information

Applied patches: 1 -> 1 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=37049 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20240804183544.691898-2-mary.bennett682@gmail.com/ Patch id: 95269

Build Targets

Some targets are built as multilibs. If a build target ends with `multilib`, please refer to the table below to see all the targets within that multilib.	Target name	`-march` string
newlib-rv64gcv-lp64d-multilib	`rv64gcv-lp64d`, `rv32gc-ilp32d`, `rv64gc-lp64d`, `rv32imc_zba_zbb_zbc_zbs-ilp32`
linux-rv64gcv-lp64d-multilib	`rv32gcv-ilp32d`, `rv64gcv-lp64d`
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib	`rv32gc_zba_zbb_zbc_zbs-ilp32d`, `rv64gc_zba_zbb_zbc_zbs-lp64d`

Target Information

Target Shorthand	`-march` string
Bitmanip	`gc_zba_zbb_zbc_zbs`

Notes

Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com

github-actions[bot] commented 1 month ago

Lint Status

The following issues have been found with 37049-RISCV_Support_COREV_XCVBITMAIP_extension-1 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.

=== ERROR type #1: blocks of 8 spaces should be replaced with tabs (71 error(s)) ===
gcc/config/riscv/corev.def:205:112:RISCV_BUILTIN (cv_bitmanip_extract,     "cv_bitmanip_extract",     RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_USI_UHI,████████ cvbitmanip),
gcc/config/riscv/corev.def:206:113:RISCV_BUILTIN (cv_bitmanip_extractu,    "cv_bitmanip_extractu",    RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI,████████cvbitmanip),
gcc/config/riscv/corev.def:208:32:RISCV_BUILTIN (cv_bitmanip_bclr,████████"cv_bitmanip_bclr",████████RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI,████████cvbitmanip),
gcc/config/riscv/corev.def:209:32:RISCV_BUILTIN (cv_bitmanip_bset,████████"cv_bitmanip_bset",████████RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI,████████cvbitmanip),
gcc/config/riscv/corev.def:210:31:RISCV_BUILTIN (cv_bitmanip_ff1,████████ "cv_bitmanip_ff1",████████ RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI,████████    cvbitmanip),
gcc/config/riscv/corev.def:211:31:RISCV_BUILTIN (cv_bitmanip_fl1,████████ "cv_bitmanip_fl1",████████ RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI,████████    cvbitmanip),
gcc/config/riscv/corev.def:212:31:RISCV_BUILTIN (cv_bitmanip_clb,████████ "cv_bitmanip_clb",████████ RISCV_BUILTIN_DIRECT, RISCV_UQI_FTYPE_USI,████████    cvbitmanip),
gcc/config/riscv/corev.def:213:31:RISCV_BUILTIN (cv_bitmanip_cnt,████████ "cv_bitmanip_cnt",████████ RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI,████████    cvbitmanip),
gcc/config/riscv/corev.def:214:31:RISCV_BUILTIN (cv_bitmanip_ror,████████ "cv_bitmanip_ror",████████ RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI,████████cvbitmanip),
gcc/config/riscv/corev.md:2661:0:████████(sign_extract:SI
gcc/config/riscv/corev.md:2662:0:████████  (match_operand:SI 1 "register_operand" "r,r")
gcc/config/riscv/corev.md:2663:0:████████  (ashiftrt:SI
gcc/config/riscv/corev.md:2664:0:████████    (match_operand:HI 2 "bit_extract_operand" "CV_bit_si10,r")
gcc/config/riscv/corev.md:2665:0:████████    (const_int 5))
gcc/config/riscv/corev.md:2666:0:████████  (plus:SI
gcc/config/riscv/corev.md:2667:0:████████    (and:SI
gcc/config/riscv/corev.md:2668:0:████████      (match_dup 2)
gcc/config/riscv/corev.md:2669:0:████████      (const_int 31))
gcc/config/riscv/corev.md:2670:0:████████    (const_int 1))))]
gcc/config/riscv/corev.md:2681:0:████████(zero_extract:SI
gcc/config/riscv/corev.md:2683:0:████████  (ashiftrt:SI
gcc/config/riscv/corev.md:2684:0:████████    (match_operand:HI 2 "bit_extract_operand" "CV_bit_si10,r")
gcc/config/riscv/corev.md:2685:0:████████    (const_int 5))
gcc/config/riscv/corev.md:2686:0:████████  (plus:SI
gcc/config/riscv/corev.md:2688:0:████████      (match_dup 2)
gcc/config/riscv/corev.md:2689:0:████████      (const_int 31))
gcc/config/riscv/corev.md:2690:0:████████    (const_int 1))))]
gcc/config/riscv/corev.md:2702:0:████████  (and:SI
gcc/config/riscv/corev.md:2703:0:████████    (match_operand:SI 3 "register_operand" "0,0")
gcc/config/riscv/corev.md:2704:0:████████    (zero_extract:SI
gcc/config/riscv/corev.md:2705:0:████████      (const_int 0)
gcc/config/riscv/corev.md:2706:0:████████    (ashiftrt:SI
gcc/config/riscv/corev.md:2707:0:████████      (match_operand:HI 2 "bit_extract_operand" "CV_bit_si10,r")
gcc/config/riscv/corev.md:2708:0:████████      (const_int 5))
gcc/config/riscv/corev.md:2709:0:████████    (plus:SI
gcc/config/riscv/corev.md:2710:0:████████      (and:SI
gcc/config/riscv/corev.md:2711:0:████████████████(match_dup 2)
gcc/config/riscv/corev.md:2712:0:████████████████(const_int 31))
gcc/config/riscv/corev.md:2713:0:████████      (const_int 1))))
gcc/config/riscv/corev.md:2715:0:████████    (match_operand:SI 1 "register_operand" "r,r")
gcc/config/riscv/corev.md:2716:0:████████    (ashiftrt:SI
gcc/config/riscv/corev.md:2717:0:████████      (match_dup 2)
gcc/config/riscv/corev.md:2718:0:████████      (const_int 5))
gcc/config/riscv/corev.md:2719:0:████████    (plus:SI
gcc/config/riscv/corev.md:2720:0:████████      (and:SI
gcc/config/riscv/corev.md:2721:0:████████████████(match_dup 2)
gcc/config/riscv/corev.md:2722:0:████████████████(const_int 31))
gcc/config/riscv/corev.md:2723:0:████████      (const_int 1)))))]
gcc/config/riscv/corev.md:2735:0:████████ (match_operand:SI 1 "register_operand" "r,r")
gcc/config/riscv/corev.md:2742:0:████████     (lshiftrt:SI
gcc/config/riscv/corev.md:2744:0:████████       (match_operand:HI 2 "bit_extract_operand" "CV_bit_si10,r")
gcc/config/riscv/corev.md:2746:0:████████      (const_int 5))))
gcc/config/riscv/corev.md:2747:0:████████   (and:SI
gcc/config/riscv/corev.md:2748:0:████████    (match_dup 2)
gcc/config/riscv/corev.md:2749:0:████████    (const_int 31))))))]
gcc/config/riscv/corev.md:2760:0:████████(ior:SI
gcc/config/riscv/corev.md:2761:0:████████  (match_operand:SI 1 "register_operand" "r,r")
gcc/config/riscv/corev.md:2767:0:████████     (lshiftrt:SI
gcc/config/riscv/corev.md:2769:0:████████       (match_operand:HI 2 "bit_extract_operand" "CV_bit_si10,r")
gcc/config/riscv/corev.md:2771:0:████████      (const_int 5))))
gcc/config/riscv/corev.md:2772:0:████████   (and:SI
gcc/config/riscv/corev.md:2773:0:████████    (match_dup 2)
gcc/config/riscv/corev.md:2774:0:████████    (const_int 31)))))]
gcc/config/riscv/corev.md:2785:0:████████(ctz:SI (match_operand:SI 1 "register_operand" "r")))]
gcc/config/riscv/corev.md:2814:0:████████(popcount:SI (match_operand:SI 1 "register_operand" "r")))]
gcc/config/riscv/corev.md:2823:0:████████(rotatert:SI (match_operand:SI 1 "register_operand" "r")
gcc/config/riscv/corev.md:2824:0:████████████████     (match_operand:SI 2 "register_operand" "r")))]
gcc/config/riscv/corev.md:2833:0:████████(unspec:SI [(match_operand:SI 1 "register_operand" "r")
gcc/config/riscv/corev.md:2834:0:████████████████    (match_operand:QI 2 "const_csr_operand" "K")
gcc/config/riscv/corev.md:2835:0:████████████████    (match_operand:QI 3 "const_int2_operand" "D03")]
gcc/config/riscv/corev.md:2836:0:████████ UNSPEC_CV_BITMANIP_BITREV))]

=== ERROR type #2: dot, space, space, new sentence (6 error(s)) ===
gcc/doc/extend.texi:25618:13:architecture.█For more information on CORE-V built-ins, please see
gcc/doc/extend.texi:25622:76:Generated assembler @code{cv.extract} if the uint16_t operand is a constant.█Generated assembler
gcc/doc/extend.texi:25627:77:Generated assembler @code{cv.extractu} if the uint16_t operand is a constant.█Generated assembler
gcc/doc/extend.texi:25632:75:Generated assembler @code{cv.insert} if the uint16_t operand is a constant.█Generated assembler
gcc/doc/extend.texi:25637:73:Generated assembler @code{cv.bclr} if the uint16_t operand is a constant.█Generated assembler
gcc/doc/extend.texi:25642:73:Generated assembler @code{cv.bset} if the uint16_t operand is a constant.█Generated assembler

=== ERROR type #3: lines should not exceed 80 characters (28 error(s)) ===
gcc/config/riscv/corev.def:205:80:RISCV_BUILTIN (cv_bitmanip_extract,     "cv_bitmanip_extract",     RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_USI_UHI,         cvbitmanip),
gcc/config/riscv/corev.def:206:80:RISCV_BUILTIN (cv_bitmanip_extractu,    "cv_bitmanip_extractu",    RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI,        cvbitmanip),
gcc/config/riscv/corev.def:207:80:RISCV_BUILTIN (cv_bitmanip_insert,      "cv_bitmanip_insert",      RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI_USI,    cvbitmanip),
gcc/config/riscv/corev.def:208:80:RISCV_BUILTIN (cv_bitmanip_bclr,        "cv_bitmanip_bclr",        RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI,        cvbitmanip),
gcc/config/riscv/corev.def:209:80:RISCV_BUILTIN (cv_bitmanip_bset,        "cv_bitmanip_bset",        RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UHI,        cvbitmanip),
gcc/config/riscv/corev.def:210:80:RISCV_BUILTIN (cv_bitmanip_ff1,         "cv_bitmanip_ff1",         RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI,            cvbitmanip),
gcc/config/riscv/corev.def:211:80:RISCV_BUILTIN (cv_bitmanip_fl1,         "cv_bitmanip_fl1",         RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI,            cvbitmanip),
gcc/config/riscv/corev.def:212:80:RISCV_BUILTIN (cv_bitmanip_clb,         "cv_bitmanip_clb",         RISCV_BUILTIN_DIRECT, RISCV_UQI_FTYPE_USI,            cvbitmanip),
gcc/config/riscv/corev.def:213:80:RISCV_BUILTIN (cv_bitmanip_cnt,         "cv_bitmanip_cnt",         RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI,            cvbitmanip),
gcc/config/riscv/corev.def:214:80:RISCV_BUILTIN (cv_bitmanip_ror,         "cv_bitmanip_ror",         RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI,        cvbitmanip),
gcc/config/riscv/corev.def:215:80:RISCV_BUILTIN (cv_bitmanip_bitrev,      "cv_bitmanip_bitrev",      RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_UQI_UQI,    cvbitmanip),
gcc/doc/extend.texi:25619:80:@uref{https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#pulp-bit-manipulation-builtins-for-32-bit-cores}
gcc/doc/extend.texi:25621:80:@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_bitmanip_extract (uint32_t, uint16_t)
gcc/doc/extend.texi:25622:80:Generated assembler @code{cv.extract} if the uint16_t operand is a constant. Generated assembler
gcc/doc/extend.texi:25626:80:@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_bitmanip_extractu (uint32_t, uint16_t)
gcc/doc/extend.texi:25627:80:Generated assembler @code{cv.extractu} if the uint16_t operand is a constant. Generated assembler
gcc/doc/extend.texi:25631:80:@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_bitmanip_insert (uint32_t, uint16_t, uint32_t)
gcc/doc/extend.texi:25632:80:Generated assembler @code{cv.insert} if the uint16_t operand is a constant. Generated assembler
gcc/doc/extend.texi:25636:80:@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_bitmanip_bclr (uint32_t, uint16_t)
gcc/doc/extend.texi:25637:80:Generated assembler @code{cv.bclr} if the uint16_t operand is a constant. Generated assembler
gcc/doc/extend.texi:25641:80:@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_bitmanip_bset (uint32_t, uint16_t)
gcc/doc/extend.texi:25642:80:Generated assembler @code{cv.bset} if the uint16_t operand is a constant. Generated assembler
gcc/doc/extend.texi:25646:80:@deftypefn {Built-in Function} {uint8_t} __builtin_riscv_cv_bitmanip_ff1 (uint32_t)
gcc/doc/extend.texi:25650:80:@deftypefn {Built-in Function} {uint8_t} __builtin_riscv_cv_bitmanip_fl1 (uint32_t)
gcc/doc/extend.texi:25654:80:@deftypefn {Built-in Function} {uint8_t} __builtin_riscv_cv_bitmanip_clb (uint32_t)
gcc/doc/extend.texi:25658:80:@deftypefn {Built-in Function} {uint8_t} __builtin_riscv_cv_bitmanip_cnt (uint32_t)
gcc/doc/extend.texi:25662:80:@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_bitmanip_ror (uint32_t, uint32_t)
gcc/doc/extend.texi:25666:80:@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_bitmanip_bitrev (uint32_t, uint8_t, uint8_t)

=== ERROR type #4: there should be exactly one space between function name and parenthesis (2 error(s)) ===
gcc/config/riscv/riscv.opt:477:4:Mask(XCVBI) Var(riscv_xcv_subext)
gcc/config/riscv/riscv.opt:479:4:Mask(XCVBITMANIP) Var(riscv_xcv_subext)

Additional information

github-actions[bot] commented 1 month ago

Apply Status

Target	Status
Baseline hash: https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca	Applied
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca	Applied

Git log

git log --oneline from the most recently applied patch to the baseline

> git log --oneline 7cd71c88637e133cf983c235a29f65fdcc1e28ca^..HEAD
466285df59c RISC-V: Add support for XCVbitmanip extension in CV32E40P
7cd71c88637 Daily bump.

Notes

Patch applied successfully

Additional information

github-actions[bot] commented 1 month ago

Build GCC Status

Target	Status
newlib-rv64gc-lp64d-non-multilib	Success
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib	Pending
newlib-rv64gcv-lp64d-multilib	Success
linux-rv64gcv-lp64d-multilib	Success
linux-rv64gc-lp64d-non-multilib	Success

Notes

Patch(es) were applied to the hash https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca. If this patch commit depends on or conflicts with a recently committed patch, then these results may be outdated.

Additional information

github-actions[bot] commented 1 month ago

Testsuite Status

Summary

New Failures	gcc	g++	gfortran	Previous Hash

Resolved Failures	gcc	g++	gfortran	Previous Hash

Unresolved Failures	gcc	g++	gfortran	Previous Hash
linux: rv32 Bitmanip ilp32d medlow multilib	256/55	3/1	12/2	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
linux: rv32gcv ilp32d medlow multilib	302/82	9/3	12/2	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
linux: rv64 Bitmanip lp64d medlow multilib	256/56	3/1	12/2	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
linux: rv64gcv lp64d medlow multilib	300/82	9/3	12/2	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
newlib: rv32gc ilp32d medlow multilib	287/61	43/17	0/0	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
newlib: rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib	289/63	43/17	0/0	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
newlib: rv64gc lp64d medlow multilib	278/59	22/14	0/0	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca
newlib: rv64gcv lp64d medlow multilib	323/85	28/16	0/0	https://github.com/gcc-mirror/gcc/commit/7cd71c88637e133cf983c235a29f65fdcc1e28ca

Additional information

ewlu / gcc-precommit-ci

Patch Status 37049-RISCV_Support_COREV_XCVBITMAIP_extension-1 #2003

Precommit CI Run information

Patch information

Build Targets

Target Information

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Git log

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Build GCC Status

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Summary