Open github-actions[bot] opened 2 months ago
The following issues have been found with 38640-Hard_Register_Constraints-4 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.
=== ERROR type #1: lines should not exceed 80 characters (10 error(s)) ===
gcc/gimplify_reg_info.h:54:80: m_early_clobbered_in_output = &m_buf[num_alternatives * 3 + num_outputs];
gcc/gimplify.cc:7037:80: const char *constraint = TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (link)));
gcc/stmt.cc:233:80: " to be used as a register variable", reg_names[reg_number], operand_num);
gcc/stmt.cc:383:80: error ("hard register constraints are only supported while using LRA");
gcc/stmt.cc:414:80: error ("constraint and register %<asm%> for output operand %i are unsatisfiable", operand_num);
gcc/stmt.cc:584:80: error ("hard register constraints are only supported while using LRA");
gcc/stmt.cc:606:80: error ("invalid hard register usage between earlyclobber operand and input operand");
gcc/stmt.cc:617:80: error ("constraint and register %<asm%> for input operand %i are unsatisfiable", input_num);
gcc/stmt.cc:671:80: error ("invalid hard register usage between earlyclobber operand and input operand");
gcc/stmt.cc:676:80: error ("invalid hard register usage between output operand and matching constraint operand");
=== ERROR type #2: there should be exactly one space between function name and parenthesis (1 error(s)) ===
gcc/stmt.cc:220:51:/* Perform a similar check as done in make_decl_rtl(). */
Target | Status |
---|---|
Baseline hash: https://github.com/gcc-mirror/gcc/commit/45cacfe7325bdbed4a2393927812561f64b9afd1 | Applied |
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/4b7e6d5faa137f18a36d8c6323a8640e61ee48f1 | Applied |
git log --oneline from the most recently applied patch to the baseline
> git log --oneline 45cacfe7325bdbed4a2393927812561f64b9afd1^..HEAD
a260ea35442 Rewrite register asm into hard register constraints
6017a7f980d genoutput: Verify hard register constraints
6909622c88d Error handling for hard register constraints
469d2e0b336 Hard register constraints
45cacfe7325 phiopt: C++ify cond_if_else_store_replacement
Patch applied successfully
Target | Status |
---|---|
linux-rv64gc-lp64d-non-multilib | Success |
newlib-rv64gcv-lp64d-multilib | Success |
linux-rv64gcv-lp64d-multilib | Success |
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib | Success |
newlib-rv64gc-lp64d-non-multilib | Success |
Patch(es) were applied to the hash https://github.com/gcc-mirror/gcc/commit/45cacfe7325bdbed4a2393927812561f64b9afd1. If this patch commit depends on or conflicts with a recently committed patch, then these results may be outdated.
The following targets are build only targets:
Resolved Failures | gcc | g++ | gfortran | Previous Hash |
---|
FAIL: compiler driver --help=common option(s): "^ +-.*[^:.]$" absent from output: " -fdemote-register-asm Demote local register asm and use hard register constraints instead"
linux rv32gc_zba_zbb_zbc_zbs ilp32d medlow multilib:
FAIL: gcc.dg/asm-hard-reg-5.c (test for excess errors)
newlib rv32gc ilp32d medlow multilib:
FAIL: gcc.dg/asm-hard-reg-5.c (test for excess errors)
linux rv32gcv ilp32d medlow multilib:
FAIL: gcc.dg/asm-hard-reg-5.c (test for excess errors)
newlib rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib:
FAIL: gcc.dg/asm-hard-reg-4.c (test for excess errors)
FAIL: gcc.dg/asm-hard-reg-5.c (test for excess errors)
Precommit CI Run information
Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/10924744877
Patch information
Applied patches: 1 -> 4 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=38640 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20240918144332.3544018-5-stefansf@gcc.gnu.org/ Patch id: 97658
Build Targets
multilib
, please refer to the table below to see all the targets within that multilib.-march
stringrv64gcv-lp64d
,rv32gc-ilp32d
,rv64gc-lp64d
,rv32imc_zba_zbb_zbc_zbs-ilp32
rv32gcv-ilp32d
,rv64gcv-lp64d
rv32gc_zba_zbb_zbc_zbs-ilp32d
,rv64gc_zba_zbb_zbc_zbs-lp64d
Target Information
-march
stringgc_zba_zbb_zbc_zbs
Notes
Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com