ewlu / gcc-precommit-ci

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Patch Status 40213-RISCV_zeroextendnot__xor_optimization_PR112398-1 #2517

Open github-actions[bot] opened 1 hour ago

github-actions[bot] commented 1 hour ago

Precommit CI Run information

Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/11641601617

Patch information

Applied patches: 1 -> 1 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=40213 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/3ebcb202-d6e5-4368-9217-033345fa308a@samsung.com/ Patch id: 100100

Build Targets

Some targets are built as multilibs. If a build target ends with multilib, please refer to the table below to see all the targets within that multilib. Target name -march string
newlib-rv64gcv-lp64d-multilib rv64gcv-lp64d, rv32gc-ilp32d, rv64gc-lp64d, rv32imc_zba_zbb_zbc_zbs-ilp32
linux-rv64gcv-lp64d-multilib rv32gcv-ilp32d, rv64gcv-lp64d
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib rv32gc_zba_zbb_zbc_zbs-ilp32d, rv64gc_zba_zbb_zbc_zbs-lp64d

Target Information

Target Shorthand -march string
Bitmanip gc_zba_zbb_zbc_zbs

Notes

Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com

github-actions[bot] commented 1 hour ago

Lint Status

The following issues have been found with 40213-RISCV_zeroextendnot__xor_optimization_PR112398-1 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.

Traceback (most recent call last):
  File "./gcc/contrib/check_GNU_style.py", line 45, in <module>
    main()
  File "./gcc/contrib/check_GNU_style.py", line 43, in main
    check_GNU_style_file(diff_file, format)
  File "/home/runner/work/gcc-precommit-ci/gcc-precommit-ci/riscv-gnu-toolchain/gcc/contrib/check_GNU_style_lib.py", line 279, in check_GNU_style_file
    patch = PatchSet(file)
  File "/home/runner/.local/lib/python3.8/site-packages/unidiff/patch.py", line 462, in __init__
    self._parse(data, encoding=encoding, metadata_only=metadata_only)
  File "/home/runner/.local/lib/python3.8/site-packages/unidiff/patch.py", line 552, in _parse
    current_file._parse_hunk(line, diff, encoding, metadata_only)
  File "/home/runner/.local/lib/python3.8/site-packages/unidiff/patch.py", line 318, in _parse_hunk
    raise UnidiffParseError(
unidiff.errors.UnidiffParseError: Hunk diff line expected: (rtx_code code, machine_mode mode,

Additional information

github-actions[bot] commented 1 hour ago

Apply Status

Target Status
Baseline hash: https://github.com/gcc-mirror/gcc/commit/441676b5886b2b461ad3f6b22a03c9bbc183db3f Failed
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/6a2e8913df605e62f20833a6e688ea1950147edc Failed

Command

> git am ../patches/*.patch --whitespace=fix -q --3way --empty=drop

Output

error: corrupt patch at line 12
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
hint: When you have resolved this problem, run "git am --continue".
hint: If you prefer to skip this patch, run "git am --skip" instead.
hint: To restore the original branch and stop patching, run "git am --abort".
hint: Disable this message with "git config advice.mergeConflict false"
Patch failed at 0001 RISC-V: zero_extend(not) -> xor optimization [PR112398]
---
  gcc/simplify-rtx.cc                       | 23 +++++++++++++++++++++++
  gcc/testsuite/gcc.target/riscv/pr112398.c | 14 ++++++++++++++
  2 files changed, 37 insertions(+)
  create mode 100644 gcc/testsuite/gcc.target/riscv/pr112398.c

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 2c04ce960ee..608ecedbcb8 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -1842,6 +1842,29 @@ simplify_context::simplify_unary_operation_1 
(rtx_code code, machine_mode mode,
            & ~GET_MODE_MASK (op_mode)) == 0)
      return SUBREG_REG (op);

+      /* Trying to optimize:
+     (zero_extend:M (subreg:N (not:M (X:M)))) ->
+     (xor:M (zero_extend:M (subreg:N (X:M)), 0xffff))
+     where mask takes 0xffff bits of N mode bitsize.
+     For the cases when X:M doesn't have any non-zero bits
+     outside of mode N, (zero_extend:M (subreg:N (X:M))
+     will be simplified to just (X:M)
+     and whole optimization will be -> (xor:M (X:M), 0xffff). */
+      if (GET_CODE (op) == SUBREG
+      && GET_CODE (XEXP (op, 0)) == NOT
+      && GET_MODE (XEXP (op, 0)) == mode
+      && GET_MODE (XEXP (XEXP (op, 0), 0)) == mode
+      && subreg_lowpart_p (op)
+      && (nonzero_bits (XEXP (XEXP (op, 0), 0), mode)
+          & ~GET_MODE_MASK (GET_MODE (XEXP (XEXP (op, 0), 0)))) == 0)
+      {
+    const uint64_t mask
+      = ~((uint64_t)~0 << GET_MODE_BITSIZE (GET_MODE (op)).coeffs[0]);
+    return simplify_gen_binary (XOR, mode,
+                    XEXP (XEXP (op, 0), 0),
+                    gen_int_mode (mask, mode));
+      }
+
  #if defined(POINTERS_EXTEND_UNSIGNED)
        /* As we do not know which address space the pointer is 
referring to,
       we can do this only if the target does not support different pointer
diff --git a/gcc/testsuite/gcc.target/riscv/pr112398.c 
b/gcc/testsuite/gcc.target/riscv/pr112398.c
new file mode 100644
index 00000000000..624a665b76c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr112398.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+
+#include <stdint.h>
+
+uint8_t neg_u8 (const uint8_t src)
+{
+  return ~src;
+}
+
+/* { dg-final { scan-assembler-times "xori\t" 1 } } */
+/* { dg-final { scan-assembler-not "not\t" } } */
+/* { dg-final { scan-assembler-not "andi\t" } } */

Additional information