ewlu / gcc-precommit-ci

2 stars 0 forks source link

Patch Status 40743-14_RISCV_Add_Zicfiss_ISA_extension-3 #2590

Open github-actions[bot] opened 2 hours ago

github-actions[bot] commented 2 hours ago

Precommit CI Run information

Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/11855339845

Patch information

Applied patches: 1 -> 3 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=40743 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20241115105310.37285-3-monk.chiang@sifive.com/ Patch id: 101172

Build Targets

Some targets are built as multilibs. If a build target ends with multilib, please refer to the table below to see all the targets within that multilib. Target name -march string
newlib-rv64gcv-lp64d-multilib rv64gcv-lp64d, rv32gc-ilp32d, rv64gc-lp64d, rv32imc_zba_zbb_zbc_zbs-ilp32
linux-rv64gcv-lp64d-multilib rv32gcv-ilp32d, rv64gcv-lp64d
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib rv32gc_zba_zbb_zbc_zbs-ilp32d, rv64gc_zba_zbb_zbc_zbs-lp64d

Target Information

Target Shorthand -march string
Bitmanip gc_zba_zbb_zbc_zbs

Notes

Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com

github-actions[bot] commented 2 hours ago

Lint Status

The following issues have been found with 40743-14_RISCV_Add_Zicfiss_ISA_extension-3 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.

=== ERROR type #1: a space should not precede a tab (1 error(s)) ===
gcc/config/riscv/riscv.cc:10761:0: ████████  unsigned HOST_WIDE_INT lpad_code;

=== ERROR type #2: dot, space, space, end of comment (10 error(s)) ===
gcc/config/riscv/riscv-zicfilp.cc:69:20:  RTL_PASS, /* type.█*/
gcc/config/riscv/riscv-zicfilp.cc:70:23:  "zisslpcfi", /* name.█*/
gcc/config/riscv/riscv-zicfilp.cc:71:34:  OPTGROUP_NONE, /* optinfo_flags.█*/
gcc/config/riscv/riscv-zicfilp.cc:72:24:  TV_MACH_DEP, /* tv_id.█*/
gcc/config/riscv/riscv-zicfilp.cc:73:28:  0, /* properties_required.█*/
gcc/config/riscv/riscv-zicfilp.cc:74:28:  0, /* properties_provided.█*/
gcc/config/riscv/riscv-zicfilp.cc:75:29:  0, /* properties_destroyed.█*/
gcc/config/riscv/riscv-zicfilp.cc:76:25:  0, /* todo_flags_start.█*/
gcc/config/riscv/riscv-zicfilp.cc:77:26:  0, /* todo_flags_finish.█*/
gcc/config/riscv/riscv-zicfilp.cc:87:28:   before branch shortening.█*/

=== ERROR type #3: dot, space, space, new sentence (4 error(s)) ===
gcc/config/riscv/riscv-zicfilp.cc:47:65:/* This pass implements forward-CFI landing pad checks for RISCV.█This is
gcc/config/riscv/riscv-zicfilp.cc:49:52:   AArch64 and IBT (indirect branch tracking)in X86.█A LPAD (landing-pad
gcc/config/riscv/riscv-zicfilp.cc:54:54:   landing-pad check label instructions behave as NOP.█When implemented in
gcc/config/riscv/riscv-zicfilp.cc:56:13:   LPAD insn.█Otherwise, the CPU reaises an exception.

=== ERROR type #4: lines should not exceed 80 characters (9 error(s)) ===
gcc/config/riscv/riscv.cc:10780:80:      rtx lui_hi_chain_value = force_reg (SImode, gen_int_mode (lui_hi_chain_code,
gcc/config/riscv/riscv.cc:10843:80:      mem = adjust_address (m_tramp, SImode, insn_count * GET_MODE_SIZE (SImode));
gcc/config/riscv/riscv.cc:10867:80:          trampoline[3] = OPCODE_JALR | (RISCV_PROLOGUE_TEMP_REGNUM << SHIFT_RS1);
gcc/config/riscv/riscv.cc:10874:80:              mem = adjust_address (m_tramp, SImode, i * GET_MODE_SIZE (SImode));
gcc/config/riscv/riscv.cc:10887:80:          trampoline_cfi[0] = OPCODE_AUIPC | (0 << SHIFT_RD) | (lp_value << IMM_BITS);
gcc/config/riscv/riscv.cc:10900:80:          trampoline_cfi[5] = OPCODE_JALR | (RISCV_PROLOGUE_TEMP_REGNUM << SHIFT_RS1);
gcc/config/riscv/riscv.cc:10907:80:              mem = adjust_address (m_tramp, SImode, i * GET_MODE_SIZE (SImode));
gcc/config/riscv/riscv.md:4730:80:        (unspec_volatile [(match_operand:GPR 0 "immediate_operand" "i")] UNSPECV_SETLPL))]
gcc/config/riscv/riscv.md:4744:80:        (unspec_volatile [(match_operand:GPR 0 "register_operand" "r")] UNSPECV_SET_GUARDED))]

=== ERROR type #5: there should be exactly one space between function name and parenthesis (2 error(s)) ===
gcc/config/riscv/riscv.cc:10219:13:    emit_insn(gen_lpad (const1_rtx));
gcc/config/riscv/riscv.opt:258:4:Mask(ZICFILP)     Var(riscv_zi_subext)

Additional information

github-actions[bot] commented 2 hours ago

Apply Status

Target Status
Baseline hash: https://github.com/gcc-mirror/gcc/commit/715eb6610b407e929bfcf151bbc34a71b48755fd Applied
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/71bf2bef5e99aad810eb65847d878360a0042a02 Applied

Git log

git log --oneline from the most recently applied patch to the baseline

> git log --oneline 715eb6610b407e929bfcf151bbc34a71b48755fd^..HEAD
87c17781491 RISC-V: Add .note.gnu.property for ZICFILP and ZICFISS ISA extension
10424a21a52 RISC-V: Add Zicfilp ISA extension.
2e796d9cbb4 RISC-V: Add Zicfiss ISA extension.
715eb6610b4 Daily bump.

Notes

Patch applied successfully

Additional information

github-actions[bot] commented 2 hours ago

Build GCC Status

Target Status
linux-rv64gc-lp64d-non-multilib Success
newlib-rv64gc-lp64d-non-multilib Success

Notes

Patch(es) were applied to the hash https://github.com/gcc-mirror/gcc/commit/715eb6610b407e929bfcf151bbc34a71b48755fd. If this patch commit depends on or conflicts with a recently committed patch, then these results may be outdated.

The following targets are build only targets:

Additional information

github-actions[bot] commented 2 hours ago

Testsuite Status

Waiting for build to complete.

Additional information