ewlu / gcc-precommit-ci

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Patch Status 41103-Improve_and_add_VLS_slide_strategies-4 #2649

Open github-actions[bot] opened 4 days ago

github-actions[bot] commented 4 days ago

Precommit CI Run information

Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/11978152927

Patch information

Applied patches: 1 -> 4 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=41103 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20241122182053.194438-5-rdapp.gcc@gmail.com/ Patch id: 101760

Build Targets

Some targets are built as multilibs. If a build target ends with multilib, please refer to the table below to see all the targets within that multilib. Target name -march string
newlib-rv64gcv-lp64d-multilib rv64gcv-lp64d, rv32gc-ilp32d, rv64gc-lp64d, rv32imc_zba_zbb_zbc_zbs-ilp32
linux-rv64gcv-lp64d-multilib rv32gcv-ilp32d, rv64gcv-lp64d
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib rv32gc_zba_zbb_zbc_zbs-ilp32d, rv64gc_zba_zbb_zbc_zbs-lp64d

Target Information

Target Shorthand -march string
Bitmanip gc_zba_zbb_zbc_zbs

Notes

Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com

github-actions[bot] commented 4 days ago

Lint Status

The following issues have been found with 41103-Improve_and_add_VLS_slide_strategies-4 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.

=== ERROR type #1: there should be no space before a left square bracket (1 error(s)) ===
gcc/config/riscv/riscv-v.cc:3495:40:/* Recognize interleaving patterns like [0 4 1 5].  */

Additional information

github-actions[bot] commented 4 days ago

Apply Status

Target Status
Baseline hash: https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80 Applied
Tip of tree hash: https://github.com/gcc-mirror/gcc/commit/cdd7171a6b0bc1570659afa4ee8a10fe6b894993 Applied

Git log

git log --oneline from the most recently applied patch to the baseline

> git log --oneline d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80^..HEAD
2a5592906d4 RISC-V: Improve slide1up pattern.
4904d85805f RISC-V: Add even/odd vec_perm_const pattern.
0b041ed2d70 RISC-V: Add interleave pattern.
8dabbc1a7cf RISC-V: Add slide to perm_const strategies.
d6d1fdcf953 i386: Make __builtin_ia32_f{nstenv,ldenv,nstsw,fnclex} builtins internal [PR117165]

Notes

Patch applied successfully

Additional information

github-actions[bot] commented 4 days ago

Build GCC Status

Target Status
linux-rv64gcv-lp64d-multilib Success
newlib-rv64gcv-lp64d-multilib Success
newlib-rv64gc-lp64d-non-multilib Success
linux-rv64gc_zba_zbb_zbc_zbs-lp64d-multilib Success
linux-rv64gc-lp64d-non-multilib Success

Notes

Patch(es) were applied to the hash https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80. If this patch commit depends on or conflicts with a recently committed patch, then these results may be outdated.

The following targets are build only targets:

Additional information

github-actions[bot] commented 4 days ago

Testsuite Status

Summary

New Failures gcc g++ gfortran Previous Hash
linux: rv32 Bitmanip ilp32d medlow multilib 3/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
linux: rv32gcv ilp32d medlow multilib 7/5 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
linux: rv64gcv lp64d medlow multilib 4/2 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv32gc ilp32d medlow multilib 3/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib 3/3 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv64gcv lp64d medlow multilib 4/2 0/0 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
Resolved Failures gcc g++ gfortran Previous Hash
Unresolved Failures gcc g++ gfortran Previous Hash
linux: rv32 Bitmanip ilp32d medlow multilib 580/71 3/1 12/2 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
linux: rv32gcv ilp32d medlow multilib 633/101 9/3 12/2 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
linux: rv64 Bitmanip lp64d medlow multilib 572/69 3/1 12/2 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
linux: rv64gcv lp64d medlow multilib 633/101 9/3 12/2 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv32gc ilp32d medlow multilib 611/77 27/5 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib 611/77 27/5 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv64gc lp64d medlow multilib 594/72 9/3 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80
newlib: rv64gcv lp64d medlow multilib 656/103 15/5 0/0 https://github.com/gcc-mirror/gcc/commit/d6d1fdcf953a79d1e3ef2d28c99c1933d1e07d80

Architecture Specific New Failures

newlib rv32gc ilp32d medlow multilib:

FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-interleave.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-slide1.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)

newlib rv64gcv lp64d medlow multilib:

FAIL: gcc.dg/vect/vect-alias-check-11.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-11.c execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c execution test

newlib rv32imc_zba_zbb_zbc_zbs ilp32 medlow multilib:

FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-interleave.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-slide1.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)

linux rv64gcv lp64d medlow multilib:

FAIL: gcc.dg/vect/vect-alias-check-11.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-11.c execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c execution test

linux rv32gc_zba_zbb_zbc_zbs ilp32d medlow multilib:

FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-interleave.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-slide1.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)

linux rv32gcv ilp32d medlow multilib:

FAIL: gcc.dg/vect/vect-alias-check-11.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-11.c execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c execution test
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-interleave.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-slide1.c -std=c99 -O3 -ftree-vectorize -mrvv-vector-bits=zvl (test for excess errors)

Additional information