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1 day ago Lint Status
The following issues have been found with 41396-RISCV_Add_intrinsics_support_and_testcases_for_SiFive_Xsfvfnrclipxfqf_extension-2 using gcc's ./contrib/check_GNU_style.py. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch.
=== ERROR type #1: blocks of 8 spaces should be replaced with tabs (24 error(s)) ===
gcc/config/riscv/riscv-vector-builtins.cc:3006:71: EEW32_INDEX, EEW64_INDEX, SHIFT, DOUBLE_TRUNC, QUAD_TRUNC, QUAD_EMUL,████████\
gcc/config/riscv/riscv-vector-builtins.cc:3007:66: QUAD_EMUL_SIGNED, QUAD_EMUL_UNSIGNED, QUAD_FIX, QUAD_FIX_SIGNED,████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3009:54: DOUBLE_TRUNC_UNSIGNED, DOUBLE_TRUNC_UNSIGNED_SCALAR,████████████████████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3012:69: EEW16_INTERPRET, EEW32_INTERPRET, EEW64_INTERPRET, BOOL1_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3013:70: BOOL2_INTERPRET, BOOL4_INTERPRET, BOOL8_INTERPRET, BOOL16_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3014:66: BOOL32_INTERPRET, BOOL64_INTERPRET, SIGNED_EEW8_LMUL1_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3015:61: SIGNED_EEW16_LMUL1_INTERPRET, SIGNED_EEW32_LMUL1_INTERPRET,████████████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3016:62: SIGNED_EEW64_LMUL1_INTERPRET, UNSIGNED_EEW8_LMUL1_INTERPRET,████████████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3017:65: UNSIGNED_EEW16_LMUL1_INTERPRET, UNSIGNED_EEW32_LMUL1_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3019:61: X16_VLMUL_EXT, X32_VLMUL_EXT, X64_VLMUL_EXT, TUPLE_SUBPART)████████████████ \
gcc/config/riscv/riscv-vector-builtins.cc:3035:36: VECTOR_TYPE_##SIGNED_EEW8_INDEX,████████████████████████████████████████ \
gcc/config/riscv/riscv-vector-builtins.def:73:71: EEW32_INDEX, EEW64_INDEX, SHIFT, DOUBLE_TRUNC, QUAD_TRUNC, QUAD_EMUL,████████\
gcc/config/riscv/riscv-vector-builtins.def:74:66: QUAD_EMUL_SIGNED, QUAD_EMUL_UNSIGNED, QUAD_FIX, QUAD_FIX_SIGNED,████████ \
gcc/config/riscv/riscv-vector-builtins.def:76:54: DOUBLE_TRUNC_UNSIGNED, DOUBLE_TRUNC_UNSIGNED_SCALAR,████████████████████████ \
gcc/config/riscv/riscv-vector-builtins.def:79:69: EEW16_INTERPRET, EEW32_INTERPRET, EEW64_INTERPRET, BOOL1_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.def:80:70: BOOL2_INTERPRET, BOOL4_INTERPRET, BOOL8_INTERPRET, BOOL16_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.def:81:66: BOOL32_INTERPRET, BOOL64_INTERPRET, SIGNED_EEW8_LMUL1_INTERPRET,████████ \
gcc/config/riscv/riscv-vector-builtins.def:82:61: SIGNED_EEW16_LMUL1_INTERPRET, SIGNED_EEW32_LMUL1_INTERPRET,████████████████ \
gcc/config/riscv/riscv-vector-builtins.def:83:62: SIGNED_EEW64_LMUL1_INTERPRET, UNSIGNED_EEW8_LMUL1_INTERPRET,████████████████ \
gcc/config/riscv/riscv-vector-builtins.def:84:65: UNSIGNED_EEW16_LMUL1_INTERPRET, UNSIGNED_EEW32_LMUL1_INTERPRET,████████ \
gcc/config/riscv/sifive-vector.md:167:53: [(set (match_operand:<SF_XFQF> 0 "register_operand"████████ "=vd, vd, vr, vr")
gcc/config/riscv/sifive-vector.md:172:42: (match_operand 6 "const_int_operand"████████" i, i, i, i")
gcc/config/riscv/sifive-vector.md:173:42: (match_operand 7 "const_int_operand"████████" i, i, i, i")
gcc/config/riscv/sifive-vector.md:174:42: (match_operand 8 "const_int_operand"████████" i, i, i, i")
=== ERROR type #2: dot, space, space, end of comment (18 error(s)) ===
gcc/config/riscv/genrvv-type-indexer.cc:253:41: fprintf (fp, " /*SIGNED_EEW8_INDEX*/ INVALID,\n");
gcc/config/riscv/genrvv-type-indexer.cc:320:40: fprintf (fp, " /*SIGNED_EEW8_INDEX*/ %s,\n",
gcc/config/riscv/genrvv-type-indexer.cc:322:19: /*unsigned_p*/ false, false)
gcc/config/riscv/genrvv-type-indexer.cc:440:36: fprintf (fp, " /*SIGNED_EEW8_INDEX*/ INVALID,\n");
gcc/config/riscv/genrvv-type-indexer.cc:514:38: fprintf (fp, " /*SIGNED_EEW8_INDEX*/ %s,\n",
gcc/config/riscv/genrvv-type-indexer.cc:516:17: /*unsigned_p*/ false, false)
gcc/config/riscv/riscv-vector-builtins-shapes.cc:1340:61: _tum\_tumu\_mu" suffixes for vop_m C++ overloaded API.*/
gcc/config/riscv/riscv-vector-builtins.cc:2550:37: * shift_type) function registration.█*/
gcc/config/riscv/riscv-vector-builtins.cc:2552:31: = {f32_ops, /* Types */
gcc/config/riscv/riscv-vector-builtins.cc:2553:36: OP_TYPE_none, /* Suffix */
gcc/config/riscv/riscv-vector-builtins.cc:2554:60: rvv_arg_type_info (RVV_BASE_eew8_index), /* Return type */
gcc/config/riscv/riscv-vector-builtins.cc:2555:22: clip_args /* Args */};
gcc/config/riscv/riscv-vector-builtins.cc:2558:37: * shift_type) function registration.█*/
gcc/config/riscv/riscv-vector-builtins.cc:2560:31: = {f32_ops, /* Types */
gcc/config/riscv/riscv-vector-builtins.cc:2561:36: OP_TYPE_none, /* Suffix */
gcc/config/riscv/riscv-vector-builtins.cc:2562:67: rvv_arg_type_info (RVV_BASE_signed_eew8_index), /* Return type */
gcc/config/riscv/riscv-vector-builtins.cc:2563:22: clip_args /* Args */};
gcc/config/riscv/riscv-vector-builtins.h:132:51: XSFVFNRCLIPXFQF_EXT, /* XSFVFNRCLIPXFQF extension */
=== ERROR type #3: dot, space, space, new sentence (1 error(s)) ===
gcc/config/riscv/riscv-vector-builtins-shapes.cc:1319:25:/* sf_vfnrclip_def class.█Handle instructions like vfnrclip. */
=== ERROR type #4: lines should not exceed 80 characters (8 error(s)) ===
gcc/config/riscv/generic-vector-ooo.md:72:80: (eq_attr "type" "vfmul,vfwmul,vfmuladd,vfwmuladd,vfwmaccbf16,sf_vqmacc,sf_vfnrclip")
gcc/config/riscv/sifive-vector-builtins-bases.cc:202:80:static CONSTEXPR const sf_vfnrclip_x_f_qf<UNSPEC_SF_VFNRCLIP> sf_vfnrclip_x_f_qf_obj;
gcc/config/riscv/sifive-vector-builtins-bases.cc:203:80:static CONSTEXPR const sf_vfnrclip_xu_f_qf<UNSPEC_SF_VFNRCLIPU> sf_vfnrclip_xu_f_qf_obj;
gcc/config/riscv/sifive-vector.md:167:80: [(set (match_operand:<SF_XFQF> 0 "register_operand" "=vd, vd, vr, vr")
gcc/config/riscv/sifive-vector.md:179:80: (match_operand:SF_VF 3 "register_operand" " vr, vr, vr, vr")] SF_VFNRCLIP)
gcc/config/riscv/sifive-vector.md:180:80: (match_operand:<SF_XFQF> 2 "vector_merge_operand" " vu, 0, vu, 0")))]
gcc/config/riscv/vector-iterators.md:4798:80: (RVVM8SF "TARGET_VECTOR_ELEN_FP_32") (RVVM4SF "TARGET_VECTOR_ELEN_FP_32") (RVVM2SF "TARGET_VECTOR_ELEN_FP_32")
gcc/config/riscv/vector-iterators.md:4799:80: (RVVM1SF "TARGET_VECTOR_ELEN_FP_32") (RVVMF2SF "TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32")
Precommit CI Run information
Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/12111312672
Patch information
Applied patches: 1 -> 2 Associated series: https://patchwork.sourceware.org/project/gcc/list/?series=41396 Last patch applied: https://patchwork.sourceware.org/project/gcc/patch/20241202013154.1690081-3-shiyulong@iscas.ac.cn/ Patch id: 102201
Build Targets
multilib, please refer to the table below to see all the targets within that multilib.-marchstringrv64gcv-lp64d,rv32gc-ilp32d,rv64gc-lp64d,rv32imc_zba_zbb_zbc_zbs-ilp32rv32gcv-ilp32d,rv64gcv-lp64drv32gc_zba_zbb_zbc_zbs-ilp32d,rv64gc_zba_zbb_zbc_zbs-lp64dTarget Information
-marchstringgc_zba_zbb_zbc_zbsNotes
Testsuite results use a more lenient allowlist to reduce error reporting with flakey tests. Please take a look at the current allowlist. Results come from a sum file comparator. Each patch is applied to a well known, non-broken baseline taken from our gcc postcommit framework (here) which runs the full gcc testsuite every 6 hours. If you have any questions or encounter any issues which may seem like false-positives, please contact us at patchworks-ci@rivosinc.com