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ewlu / riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC
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check_GNU_style.py 24592-12_RISCV_Cleanup_redundant_reduction_patterns_after_refactor_vector_mode-1 #116

Closed github-actions[bot] closed 1 year ago

github-actions[bot] commented 1 year ago

The following issues have been found with 24592-12_RISCV_Cleanup_redundant_reduction_patterns_after_refactor_vector_mode-1. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch. If any of these warnings seem like false-positives that could be guarded against please contact me: patrick@rivosinc.com.

=== ERROR type #1: blocks of 8 spaces should be replaced with tabs (32 error(s)) ===
gcc/config/riscv/autovec.md:2182:0:████████████████████████████████  CONST0_RTX (<VEL>mode));
gcc/config/riscv/vector.md:7740:0:████████     (match_operand:VI████████    3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7741:0:████████     (match_operand:<V_LMUL1>     4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7742:0:████████   ] ANY_REDUC)
gcc/config/riscv/vector.md:7754:25:     [(match_operand:<VM>████████   1 "vector_mask_operand"   "vmWc1,vmWc1")
gcc/config/riscv/vector.md:7755:20:      (match_operand████████████████5 "vector_length_operand" "   rK,   rK")
gcc/config/riscv/vector.md:7756:20:      (match_operand████████████████6 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7757:20:      (match_operand████████████████7 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7760:0:████████   (unspec:<V_EXT_LMUL1> [
gcc/config/riscv/vector.md:7761:27:      (match_operand:VI_QHS████████ 3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7763:0:████████   ] ANY_WREDUC)
gcc/config/riscv/vector.md:7781:0:████████   (unspec:<V_LMUL1> [
gcc/config/riscv/vector.md:7782:0:████████     (match_operand:VF████████    3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7783:0:████████     (match_operand:<V_LMUL1>     4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7784:0:████████   ] ANY_FREDUC)
gcc/config/riscv/vector.md:7796:25:     [(match_operand:<VM>████████  1 "vector_mask_operand"   "vmWc1,vmWc1")
gcc/config/riscv/vector.md:7797:20:      (match_operand████████       5 "vector_length_operand" "   rK,   rK")
gcc/config/riscv/vector.md:7798:20:      (match_operand████████       6 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7799:20:      (match_operand████████       7 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7800:20:      (match_operand████████       8 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7804:0:████████   (unspec:<V_LMUL1> [
gcc/config/riscv/vector.md:7805:0:████████     (match_operand:VF████████    3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7806:0:████████     (match_operand:<V_LMUL1>     4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7807:0:████████   ] ANY_FREDUC_SUM)
gcc/config/riscv/vector.md:7818:36:  [(set (match_operand:<V_EXT_LMUL1>████████ 0 "register_operand"      "=&vr, &vr")
gcc/config/riscv/vector.md:7821:25:     [(match_operand:<VM>████████   1 "vector_mask_operand"   "vmWc1,vmWc1")
gcc/config/riscv/vector.md:7822:20:      (match_operand████████████████5 "vector_length_operand" "   rK,   rK")
gcc/config/riscv/vector.md:7823:20:      (match_operand████████████████6 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7824:20:      (match_operand████████████████7 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7825:20:      (match_operand████████████████8 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7829:0:████████   (unspec:<V_EXT_LMUL1> [
gcc/config/riscv/vector.md:7832:0:████████   ] ANY_FWREDUC_SUM)

=== ERROR type #2: lines should not exceed 80 characters (38 error(s)) ===
gcc/config/riscv/autovec.md:2094:80:  riscv_vector::expand_reduction (UNSPEC_REDUC_SUM, operands, CONST0_RTX (<VEL>mode));
gcc/config/riscv/autovec.md:2114:80:  riscv_vector::expand_reduction (UNSPEC_REDUC_MAXU, operands, CONST0_RTX (<VEL>mode));
gcc/config/riscv/autovec.md:2145:80:  riscv_vector::expand_reduction (UNSPEC_REDUC_AND, operands, CONSTM1_RTX (<VEL>mode));
gcc/config/riscv/autovec.md:2154:80:  riscv_vector::expand_reduction (UNSPEC_REDUC_OR, operands, CONST0_RTX (<VEL>mode));
gcc/config/riscv/autovec.md:2163:80:  riscv_vector::expand_reduction (UNSPEC_REDUC_XOR, operands, CONST0_RTX (<VEL>mode));
gcc/config/riscv/riscv-vector-builtins-bases.cc:2261:80:static CONSTEXPR const freducop<UNSPEC_REDUC_SUM_UNORDERED, HAS_FRM> vfredusum_frm_obj;
gcc/config/riscv/riscv-vector-builtins-bases.cc:2263:80:static CONSTEXPR const freducop<UNSPEC_REDUC_SUM_ORDERED, HAS_FRM> vfredosum_frm_obj;
gcc/config/riscv/riscv-vector-builtins-bases.cc:2267:80:static CONSTEXPR const freducop<UNSPEC_WREDUC_SUM_UNORDERED, HAS_FRM> vfwredusum_frm_obj;
gcc/config/riscv/riscv-vector-builtins-bases.cc:2269:80:static CONSTEXPR const freducop<UNSPEC_WREDUC_SUM_ORDERED, HAS_FRM> vfwredosum_frm_obj;
gcc/config/riscv/vector-iterators.md:1316:80:  (UNSPEC_REDUC_MAXU "redmaxu") (UNSPEC_REDUC_MAX "redmax") (UNSPEC_REDUC_MINU "redminu") (UNSPEC_REDUC_MIN "redmin")
gcc/config/riscv/vector-iterators.md:1317:80:  (UNSPEC_REDUC_AND "redand") (UNSPEC_REDUC_OR "redor") (UNSPEC_REDUC_XOR "redxor")
gcc/config/riscv/vector-iterators.md:1319:80:  (UNSPEC_WREDUC_SUM_ORDERED "wredosum") (UNSPEC_WREDUC_SUM_UNORDERED "wredusum")
gcc/config/riscv/vector.md:7740:80:             (match_operand:VI            3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7741:80:             (match_operand:<V_LMUL1>     4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7754:80:            [(match_operand:<VM>           1 "vector_mask_operand"   "vmWc1,vmWc1")
gcc/config/riscv/vector.md:7755:80:             (match_operand                5 "vector_length_operand" "   rK,   rK")
gcc/config/riscv/vector.md:7756:80:             (match_operand                6 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7757:80:             (match_operand                7 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7761:80:             (match_operand:VI_QHS         3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7762:80:             (match_operand:<V_EXT_LMUL1>  4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7764:80:           (match_operand:<V_EXT_LMUL1>    2 "vector_merge_operand"  "   vu,    0")] UNSPEC_REDUC))]
gcc/config/riscv/vector.md:7782:80:             (match_operand:VF            3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7783:80:             (match_operand:<V_LMUL1>     4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7796:80:            [(match_operand:<VM>          1 "vector_mask_operand"   "vmWc1,vmWc1")
gcc/config/riscv/vector.md:7797:80:             (match_operand               5 "vector_length_operand" "   rK,   rK")
gcc/config/riscv/vector.md:7798:80:             (match_operand               6 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7799:80:             (match_operand               7 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7800:80:             (match_operand               8 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7805:80:             (match_operand:VF            3 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7806:80:             (match_operand:<V_LMUL1>     4 "register_operand"      "   vr,   vr")
gcc/config/riscv/vector.md:7808:80:           (match_operand:<V_LMUL1>       2 "vector_merge_operand"  "   vu,    0")] UNSPEC_REDUC))]
gcc/config/riscv/vector.md:7818:80:  [(set (match_operand:<V_EXT_LMUL1>         0 "register_operand"      "=&vr, &vr")
gcc/config/riscv/vector.md:7821:80:            [(match_operand:<VM>           1 "vector_mask_operand"   "vmWc1,vmWc1")
gcc/config/riscv/vector.md:7822:80:             (match_operand                5 "vector_length_operand" "   rK,   rK")
gcc/config/riscv/vector.md:7823:80:             (match_operand                6 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7824:80:             (match_operand                7 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7825:80:             (match_operand                8 "const_int_operand"     "    i,    i")
gcc/config/riscv/vector.md:7833:80:           (match_operand:<V_EXT_LMUL1>    2 "vector_merge_operand"  "   vu,    0")] UNSPEC_REDUC))]

Associated run is: https://github.com/patrick-rivos/riscv-gnu-toolchain/actions/runs/6172697576