ewlu / riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC
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check_GNU_style.py 24656-RISCV_Support_combine_extend_and_reduce_sum_to_widen_reduce_sum-1 #127

Closed github-actions[bot] closed 1 year ago

github-actions[bot] commented 1 year ago

The following issues have been found with 24656-RISCV_Support_combine_extend_and_reduce_sum_to_widen_reduce_sum-1. Please use your best judgement when resolving these issues. These are only warnings and do not need to be resolved in order to merge your patch. If any of these warnings seem like false-positives that could be guarded against please contact me: patrick@rivosinc.com.

=== ERROR type #1: blocks of 8 spaces should be replaced with tabs (40 error(s)) ===
gcc/config/riscv/autovec-opt.md:1202:0:████████(unspec:<V_DOUBLE_EXTEND_VEL> [
gcc/config/riscv/autovec-opt.md:1203:0:████████  (any_extend:<V_DOUBLE_EXTEND>
gcc/config/riscv/autovec-opt.md:1204:0:████████    (match_operand:VI_QHS_NO_M8 1 "register_operand"))
gcc/config/riscv/autovec-opt.md:1205:0:████████] UNSPEC_REDUC_SUM))]
gcc/config/riscv/autovec-opt.md:1212:0:████████████████████████████████  CONST0_RTX (<V_DOUBLE_EXTEND_VEL>mode));
gcc/config/riscv/autovec-opt.md:1220:0:████████(unspec:<V_DOUBLE_EXTEND_VEL> [
gcc/config/riscv/autovec-opt.md:1221:0:████████  (float_extend:<V_DOUBLE_EXTEND>
gcc/config/riscv/autovec-opt.md:1222:0:████████    (match_operand:VF_HS_NO_M8 1 "register_operand"))
gcc/config/riscv/autovec-opt.md:1223:0:████████] UNSPEC_REDUC_SUM_UNORDERED))]
gcc/config/riscv/autovec-opt.md:1230:0:████████████████████████████████  CONST0_RTX (<V_DOUBLE_EXTEND_VEL>mode));
gcc/config/riscv/autovec-opt.md:1238:0:████████(unspec:<V_DOUBLE_EXTEND_VEL> [
gcc/config/riscv/autovec-opt.md:1239:0:████████  (float_extend:<V_DOUBLE_EXTEND>
gcc/config/riscv/autovec-opt.md:1240:0:████████    (match_operand:VF_HS_NO_M8 2 "register_operand"))
gcc/config/riscv/autovec-opt.md:1241:0:████████  (match_operand:<V_DOUBLE_EXTEND_VEL> 1 "register_operand")
gcc/config/riscv/autovec-opt.md:1242:0:████████] UNSPEC_REDUC_SUM_ORDERED))]
gcc/config/riscv/autovec-opt.md:1258:0:████████(unspec:<V_DOUBLE_EXTEND_VEL> [
gcc/config/riscv/autovec-opt.md:1259:0:████████  (float_extend:<V_DOUBLE_EXTEND>
gcc/config/riscv/autovec-opt.md:1260:0:████████    (match_operand:VF_HS_NO_M8 2 "register_operand"))
gcc/config/riscv/autovec-opt.md:1261:0:████████  (match_operand:<V_DOUBLE_EXTEND_VEL> 1 "register_operand")
gcc/config/riscv/autovec-opt.md:1262:0:████████  (match_operand:<VM> 3 "vector_mask_operand")
gcc/config/riscv/autovec-opt.md:1263:0:████████  (match_operand 4 "autovec_length_operand")
gcc/config/riscv/autovec-opt.md:1264:0:████████  (match_operand 5 "const_0_operand")
gcc/config/riscv/autovec-opt.md:1265:0:████████] UNSPEC_REDUC_SUM_ORDERED))]
gcc/config/riscv/autovec.md:2091:0:████████(unspec:<VEL> [
gcc/config/riscv/autovec.md:2092:0:████████     (match_operand:VI 1 "register_operand")
gcc/config/riscv/autovec.md:2093:0:████████] UNSPEC_REDUC_SUM))]
gcc/config/riscv/autovec.md:2184:0:████████(unspec:<VEL> [
gcc/config/riscv/autovec.md:2185:0:████████     (match_operand:VF 1 "register_operand")
gcc/config/riscv/autovec.md:2186:0:████████] UNSPEC_REDUC_SUM_UNORDERED))]
gcc/config/riscv/autovec.md:2232:0:████████(unspec:<VEL> [
gcc/config/riscv/autovec.md:2233:0:████████     (match_operand:VF 2 "register_operand")
gcc/config/riscv/autovec.md:2234:0:████████     (match_operand:<VEL> 1 "register_operand")
gcc/config/riscv/autovec.md:2235:0:████████] UNSPEC_REDUC_SUM_ORDERED))]
gcc/config/riscv/autovec.md:2251:0:████████(unspec:<VEL> [
gcc/config/riscv/autovec.md:2252:0:████████  (match_operand:VF 2 "register_operand")
gcc/config/riscv/autovec.md:2253:0:████████  (match_operand:<VEL> 1 "register_operand")
gcc/config/riscv/autovec.md:2254:0:████████  (match_operand:<VM> 3 "vector_mask_operand")
gcc/config/riscv/autovec.md:2255:0:████████  (match_operand 4 "autovec_length_operand")
gcc/config/riscv/autovec.md:2256:0:████████  (match_operand 5 "const_0_operand")
gcc/config/riscv/autovec.md:2257:0:████████] UNSPEC_REDUC_SUM_ORDERED))] 

=== ERROR type #2: lines should not exceed 80 characters (8 error(s)) ===
gcc/config/riscv/autovec-opt.md:1276:80:                                    riscv_vector::reduction_type::MASK_LEN_FOLD_LEFT);
gcc/config/riscv/vector-iterators.md:1347:80:(define_code_attr WREDUC_UNSPEC [(zero_extend "UNSPEC_WREDUC_SUMU") (sign_extend "UNSPEC_WREDUC_SUM")])
gcc/config/riscv/vector-iterators.md:1774:80:  (RVVM4QI "HI") (RVVM2QI "HI") (RVVM1QI "HI") (RVVMF2QI "HI") (RVVMF4QI "HI") (RVVMF8QI "HI")
gcc/config/riscv/vector-iterators.md:2144:80:  (RVVM4QI "RVVM8HI") (RVVM2QI "RVVM4HI") (RVVM1QI "RVVM2HI") (RVVMF2QI "RVVM1HI") (RVVMF4QI "RVVMF2HI") (RVVMF8QI "RVVMF4HI")
gcc/config/riscv/vector-iterators.md:2146:80:  (RVVM4HI "RVVM8SI") (RVVM2HI "RVVM4SI") (RVVM1HI "RVVM2SI") (RVVMF2HI "RVVM1SI") (RVVMF4HI "RVVMF2SI")
gcc/config/riscv/vector-iterators.md:2148:80:  (RVVM4SI "RVVM8DI") (RVVM2SI "RVVM4DI") (RVVM1SI "RVVM2DI") (RVVMF2SI "RVVM1DI")
gcc/config/riscv/vector-iterators.md:2150:80:  (RVVM4HF "RVVM8SF") (RVVM2HF "RVVM4SF") (RVVM1HF "RVVM2SF") (RVVMF2HF "RVVM1SF") (RVVMF4HF "RVVMF2SF")
gcc/config/riscv/vector-iterators.md:2152:80:  (RVVM4SF "RVVM8DF") (RVVM2SF "RVVM4DF") (RVVM1SF "RVVM2DF") (RVVMF2SF "RVVM1DF")

=== ERROR type #3: trailing whitespace (1 error(s)) ===
gcc/config/riscv/autovec.md:2257:37:        ] UNSPEC_REDUC_SUM_ORDERED))]█

Associated run is: https://github.com/ewlu/riscv-gnu-toolchain/actions/runs/6193315176