Get the LUT cascade on ice40 working

f4pga / f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

https://f4pga.org

ISC License

256 stars 109 forks source link

Get the LUT cascade on ice40 working #139

Open mithro opened 6 years ago

mithro commented 6 years ago

LUTs in a tile can be cascaded together into a chain, useful for making a shift register style thing.

From http://www.clifford.at/icestorm/logic_tile.html

Each LUT i has four input wires lutff_i/in_0 to lutff_i/in_3. Input lutff_i/in_2 can be configured to be driven by the output of the previous LUT for i>0 (LUT cascade).

Make sure this is working.

mithro commented 6 years ago

This should be fixed by https://github.com/SymbiFlow/symbiflow-arch-defs/pull/150 -- however it really needs some better testing.

mithro commented 5 years ago

I'm working on this.