Open rw1nkler opened 4 years ago
@litghost - What is you thoughts here?
@mkurc-ant Had some screenshots?
These are those screenshots. If you look closely at the PIPs they do not have source wires.
These are those screenshots. If you look closely at the PIPs they do not have source wires.
That is super weird! What is the source for those nets?
They have sources, you can check that on these screenshots:
VPR is routing some designs on artix200t through unknown GTP PIPs. In those designs, the GTP tiles carry the horizontal clocks to the BUFHCE primitives. Since the interconnect points are "real" and no "pseudo" PIPs, the bits corresponding to the should be known. However, currently, we do not support them.
Because of the missing fasm features, the bitstream generation for these designs cannot be finished. This is the case for i.e., OpenTitan design.
This is an example of ane error which shows unsupported fasm features:
Possible solutions: