f4pga / f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
https://f4pga.org
ISC License
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Create a lot more tests for place and route #15

Open mithro opened 6 years ago

mithro commented 6 years ago

Currently the tests are;

That is a pretty big jump from the simple cases to the full CPU.

Would be good to add some simple tests like;

Then after the picorv32, we should go onto a full SoC with DDR controller and internal peripherals on a wishbone bus.

mithro commented 6 years ago

Would also be a good idea to test different flip flop types.

Some type of clock-domain-crossing would be good.