Open acomodi opened 4 years ago
What's happening here is that yosys is optimizing away the SRL. Probably need a (* KEEP *)
or equiv? Assuming that yosys accepts that.
Other possible problem is that the test logic has a bug, and as a result yosys is optimizing the entire design away. It happens :/
I see the issue, and have a straight forward change that fixes it.
The issue was that yosys was optimizing something away, but in this case it was a LUT2 that was being used to avoid directly connected unused LED's to VCC/GND. I've updated the relevant tests with a comment explaining what is going on. Something we should consider in the future is moving those tests outside the ROI, which would remove the need for having weird logic around GND/VCC directly to pads.
Top level outputs connected with GND net produce the following error: