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f4pga / f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
https://f4pga.org
ISC License
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build(deps): bump third_party/litex from `95b310e` to `23e654d` #3733

Closed dependabot[bot] closed 4 months ago

dependabot[bot] commented 4 months ago

Bumps third_party/litex from 95b310e to 23e654d.

Commits
  • 23e654d Merge pull request #1968 from VOGL-electronic/fix_liblitespi
  • 7a3b3dc Merge pull request #1966 from maass-hamburg/dts_zepyhr_include_cpu
  • 914167c Merge pull request #1969 from enjoy-digital/ghdl_fix
  • 5257dda ci: Build/Install GHDL from sources.
  • 025149c liblitespi: Fix #1967
  • ae13f15 litex_json2dts_zephyr.py: include cpu
  • 47bab2f CHANGES.md: Update.
  • 2235c71 Merge pull request #1964 from acceleratedtech/jwise/output-load-trion
  • aa9ad61 Merge pull request #1962 from VOGL-electronic/master
  • 7ad3f2c efinix: be able to specify TX_OUTPUT_LOAD on a LVDS PHY on Trion
  • Additional commits viewable in compare view


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dependabot[bot] commented 4 months ago

Superseded by #3734.