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f4pga / f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
https://f4pga.org
ISC License
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build(deps): bump third_party/litex from `95b310e` to `6fdf5a2` #3763

Closed dependabot[bot] closed 3 months ago

dependabot[bot] commented 3 months ago

Bumps third_party/litex from 95b310e to 6fdf5a2.

Commits
  • 6fdf5a2 Merge pull request #1994 from trabucayre/zynqmp_peripheral_bus
  • 146617e soc/cores/cpu/zynq700/core.py: added csr into mem_map, added M_AXI_GP0 by def...
  • cc21c66 soc/cores/cpu/zynqmp/core.py: added csr into mem_map, added M_AXI_HPM0_FPD by...
  • f46ef03 build/openfpgaloader: print command before executing it to ease debugging/man...
  • 63d72a8 soc/cores/cpu/zynqmp/core.py: added CAN over EMIO support
  • 0d1d378 soc/cores/cpu/zynqmp/core.py: added interrupts support
  • 485341a soc/cores/cpu/zynq7000/core.py: fix missing CAN IO mode (security/nitpick)
  • fba7ce4 soc/cores/cpu/zynq7000/core.py: PS CANx support with EMIO pads
  • 6c4a756 soc/cores/cpu/zynq7000/core.py: added GPx tcl configuration
  • 1335d3c soc/cores/cpu/zynq7000/core.py: enable F2P interrupts
  • Additional commits viewable in compare view


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dependabot[bot] commented 3 months ago

Superseded by #3764.