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f4pga / f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
https://f4pga.org
ISC License
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build(deps): bump third_party/litex from `95b310e` to `59fc1ca` #3924

Closed dependabot[bot] closed 3 weeks ago

dependabot[bot] commented 3 weeks ago

Bumps third_party/litex from 95b310e to 59fc1ca.

Commits
  • 59fc1ca Merge pull request #2099 from VOGL-electronic/vexiiriscv_sbi
  • 773fb34 vexiiriscv: have opensbi behind a option
  • c122573 Merge pull request #2098 from enjoy-digital/urv
  • 5f463db CHANGES.md: Update.
  • aab8912 soc/cores/cpu/urv: Move ROM init to builder and allow switching between class...
  • 9449d25 soc/cores/cpu/urv: Able to boot LiteX BIOS with im bus connected to synchrono...
  • edb56e7 soc/cores/cpu: Add initial uRV CPU support (not yet working).
  • c82fddf CHANGES.md: Update.
  • d5e4f9e soc/core/vexiiriscv : bring back xilinx support
  • 7f04caf soc/cores/cpu/zynqmp/core.py: add_ethernet: added gt_location required by SGMII
  • Additional commits viewable in compare view


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dependabot[bot] commented 3 weeks ago

Superseded by #3925.