We expect the kernel can avoid most context-switching overhead costs by eliminating periodic ticks. In most embedded RTOS, there is a trade off between high time-resolution (by increasing tick frequency) and overhead. F9 Microkernel would not use ticks and achieves high-time resolution with very low overhead.
The tickless infrastructure allows individual ARM Cortex-M to spend longer periods of time in the idle state between events when nothing is scheduled. This is hopefully accomplished by adding new ktimer / kevent API to update the tasks to use more sensible event notification mechanisms.
To be more practical, we can introduce tickless idle mode, which stops the periodic tick interrupt during idle periods (periods when there are no application tasks that are able to execute), then makes a correcting adjustment to the RTOS tick count value when the tick interrupt is restarted.
Stopping the tick interrupt allows ARM Cortex-M to remain in a deep power saving state until either an interrupt occurs, or it is time for the kernel to transition a task into the ready state.
We expect the kernel can avoid most context-switching overhead costs by eliminating periodic ticks. In most embedded RTOS, there is a trade off between high time-resolution (by increasing tick frequency) and overhead. F9 Microkernel would not use ticks and achieves high-time resolution with very low overhead.
The tickless infrastructure allows individual ARM Cortex-M to spend longer periods of time in the idle state between events when nothing is scheduled. This is hopefully accomplished by adding new ktimer / kevent API to update the tasks to use more sensible event notification mechanisms.
To be more practical, we can introduce tickless idle mode, which stops the periodic tick interrupt during idle periods (periods when there are no application tasks that are able to execute), then makes a correcting adjustment to the RTOS tick count value when the tick interrupt is restarted.
Stopping the tick interrupt allows ARM Cortex-M to remain in a deep power saving state until either an interrupt occurs, or it is time for the kernel to transition a task into the ready state.
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