Avoid unnecessary prb/drv for instance connections

[fabianschuiki]

As @maerhart pointed out, there is an issue in Moore surrounding instances, where each connected signal would first be probed, then driven to a temporary with a delay, before connecting to the instance. In cases of simple connections like .clk(clk), this is not what should happen. For expression connections like .data(a + b * 3), this is okay.

Example

The SV input

module A(input clk);
    B b(clk);
endmodule

module B(input clk);
endmodule

translates to

entity @B (i1$ %clk) -> () {
}

entity @A (i1$ %clk) -> () {
    %clk1 = prb i1$ %clk
    %0 = const i1 0
    %1 = sig i1 %0
    %2 = const time 0s 1e
    drv i1$ %1, %clk1, %2
    inst @B (i1$ %1) -> ()
}

when it should actually just be

entity @B (i1$ %clk) -> () {
}

entity @A (i1$ %clk) -> () {
    inst @B (i1$ %clk) -> ()
}

The delay of 1e is also wrong: in case of an expression, a 1d delay is expected.

Todo

• [x] During lvalue/rvalue codegen, track the required mode (signal vs. value); if an identifier refers to a signal, and signal mode is needed, don't emit the prb/drv combo.
• [x] If a temporary signal is needed, the drv should have a 1d delay

[fabianschuiki]

Implemented as of 4610d75a.