IIgs monitor listing handling of SEP and REP

[roughana]

When viewing an object file with "IIgs monitor listing (long regs)" the disassembly is not adjusted for the length of the accumulator when SEP #20 is in the the listing.

00/9952: E2 20 SEP #20 00/9954: 29 7F 91 AND #917F

Should be 00/9952: E2 20 SEP #20 00/9954: 29 7F AND #7F

And relatedly, with "IIgs monitor listing (short regs)" 00/9973: C2 20 REP #20 00/9984: 29 FF AND #FF 00/9986: 00 F0 BRK F0 00/9988: 4D 20 F4 EOR F420

Should be 00/9973: C2 20 REP #20 00/9984: 29 FF AND #00FF 00/9987: F0 4D BEQ 99D6

[fadden]

The listings are intended to mimic the IIgs monitor with either 0=m 0=x or 1=m 1=x. It doesn't try to be smart because, if it did the wrong thing, there'd be no way to override it.

There could be a third mode, e.g. "IIgs monitor listing (adaptive regs)", that tried to figure out the right thing. In the final example above, it would switch to long regs after the REP, but would have to switch back after the BEQ, because that might be a branch-always and the following code would have different register expectations. (I've thought about doing a disassembler with a notion of opcode frequency that would attempt to figure out the right register width automatically; the BRK would cause it to re-evaluate the basic block with long acc even without the nearby REP.)

[fadden]

FWIW, SourceGen handles this, and tracks flags across subroutine calls. However, it doesn't understand OMF, and doesn't do well on very large binaries.

[fadden]

The disassembler in CiderPress II tracks SEP/REP for 65816 code.