faster-cpython / ideas

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Change the DSL per #477 #478

Closed gvanrossum closed 2 years ago

gvanrossum commented 2 years ago

switch from

inst NAME (inputs -- outputs) {
    C-code
}

to

inst(NAME, (inputs -- outputs)) {
    C-code
}

Also from

inst NAME = op1 op2;

to

inst(NAME) = op1 + op2;

Change stream syntax from

#NAME
##NAME
####NAME

to

NAME/1
NAME/2
NAME/4

Finally change

family NAME = OP1, OP2, ..., OPN;

to

family(NAME) = OP1, OP2, ..., OPN;
gvanrossum commented 2 years ago

I'll hold off on this for a bit until I am more confident about the actual shape of the DSL. At the very least, the input -- outputs part needs to be parenthesized, since inputs and outputs may contain commas.

Also, AFAICT macros can't be variadic, so the kind(NAME) = ... and kind(NAME) { ... } forms need work. Possibly we just need to use different kind values (i.e. macro names).

gvanrossum commented 2 years ago

This has lingered long enough, time to merge. It's easy to iterate in this repo.

The next iteration should deal with this: