fastmachinelearning / hls4ml

Machine learning on FPGAs using HLS
https://fastmachinelearning.org/hls4ml
Apache License 2.0
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Explicit pointwise Conv1D implementation for "Latency" strategy #811

Closed jmduarte closed 8 months ago

jmduarte commented 1 year ago

Description

This is mostly for discussion and to let others test it out like @Duchstf. This PR adds an explicit pointwise Conv1D implementation, where the reuse factor (RF) is used to split the layer execution and reuse the existing module RF times

Original pointwise Conv1D:

This PR splits it into RF calls of

The II ~ RF. To turn it on you have to configure ConvImplementation of the layer named <layer>

config["LayerName"]["<layer>"]["ConvImplementation"] = "Pointwise"

Limitations:

Type of change

Tests

See test/pytest/test_pointwiseconv.py

Checklist

jmduarte commented 1 year ago

pre-commit.ci autofix

Duchstf commented 1 year ago

@jmduarte Can you re-base this to the lastest changes from #815? I'd love to try this out after that!

Duchstf commented 1 year ago

@jmduarte I'm actually trying this out now, but I just realized it is in vivado, is it possible to update this to vitis?? I would be happy to contribute if you want!!

jmduarte commented 8 months ago

Superseded by #881