feilipu
commented
7 years ago I've decided to build a retrobrew 8-bit computer, and for a variety of reasons (including parts sourcing) I decided to use a Z180 33MHZ MPU (bought on digikey).
Good choice!
Your project is probably one of the best documented and researched DIY 8-bit computers on the internet, especially for the Z-180, so I have been following your schematics very closely.
Thanks. Much appreciated. Its probably because I have a tendency to forget things, unless I write them down.
I'm working in breadboard since soldering such small components would be very time consuming, so most of the components I purchased were in DIP or PLCC formfactor, including SRAM.
I purchased a AS6C1008 1M SRAM chip which has 17 address pins (A0-A16) which leaves 3 pins hanging and I'm not sure how to reconcile them with your schematic.
That gives you 128kB of RAM. I would just connect the address pins to the Z180 sequentially, starting at the lowest address. You'll need to manage the RAM /CS pin to separate the use of RAM and Flash using the CPLD programming later.
I see that you connected the CPU pins to the SRAM pins in a non-sequential way, using the first 5 CPU pins (A0-A4) at the beginning of SRAM and the next 5 (A5-A9) at the 'end' (mapping to A15-A19 on SRAM) and the next half of the CPU pins mapping to the middle 10 on the SRAM pins in reverse order.
That was just convenience. I was plagued by the non sequential ordering of the Address pins on the Z180, which meant that my layout on the PCB was complicated and not working. I wasted a week trying to lay them out cleanly. One morning, I woke up with the revelation that it since it was RAM, the addressing can actually be random and it doesn't matter. Hence the seemingly random connection of the address lines to the RAM chip. All that matters is that for a unique address, you get back unique data. You could also connect the data lines randomly too, but that wasn't helpful for my layout.
I suppose I could do the same with the 17 pins on the 1mb SRAM chip, having the first 10 cpu pins mapping to the first and last 5 pins on the SRAM, with the remaining 7 CPU pins mapped to the middle SRAM pins in reverse order, but would that work the same way? I guess I would have to update the CUPL code for that to work?
If you're not trying to lay out a PCB, don't worry. Just connect it sequentially, starting from A0.
For Glue Logic, I decided to use a CPLD (ATF1508AS 84PLCC) instead of the 2 GALs you use, and I've read I could use that to decode the remaining 3 CPU address pins (A17-A19), but then where would they go out to, would I need a jumper for those pins, or should I use a 3-to-8 decoder, before the pins go into the CPLD?
I had trouble programming ATF16V8 PLCC with the TL-866 programmer. Basically, I couldn't get it to work. Hence I tried with Lattice GALs, and that worked. The GALs are more retro, but they're more power hungry too. YMMV, on the ATF1508 PLCC. I've no experience to contribute, sorry.
Push as many address pins as you can into the PLCC. That will allow you the most flexibility in doing /CS decisions, and make life easier in the future. IMHO, CUPL is such a nice way to describe the hardware it makes sense to use it where you can. Using the EPLD and CUPL saved me at least 2 board revisions when I was first bringing up the YAZ180.
I'm not trying to build anything fancy, and maybe one day I'll create a PCB for my project, but for now I just want to be able to: program the CPLD, boot a ROM, connect using vterm through usb, and run BASIC on my homebrew computer. I'm sure that could be done even without mapping the CPU pins 1:1 with SRAM, am I right?
You will need to map the CPU and SRAM 1:1, otherwise nothing will work. The Z180 increments its program counter by one for each instruction it retrieves, so it needs to have the low address lines connected 1:1.
And, if you're interested, the third iteration of the YAZ180 PCB is now finished and I'm building the first systems up now. I'll put a direct link to Tindie for them here, once I'm satisfied they're working correctly.
Thanks again for the questions.
grancier
Hi,
I've decided to build a retrobrew 8-bit computer, and for a variety of reasons (including parts sourcing) I decided to use a Z180 33MHZ MPU (bought on digikey).
Your project is probably one of the best documented and researched DIY 8-bit computers on the internet, especially for the Z-180, so I have been following your schematics very closely.
I'm working in breadboard since soldering such small components would be very time consuming, so most of the components I purchased were in DIP or PLCC formfactor, including SRAM.
I purchased a AS6C1008 1M SRAM chip which has 17 address pins (A0-A16) which leaves 3 pins hanging and I'm not sure how to reconcile them with your schematic. I see that you connected the CPU pins to the SRAM pins in a non-sequential way, using the first 5 CPU pins (A0-A4) at the beginning of SRAM and the next 5 (A5-A9) at the 'end' (mapping to A15-A19 on SRAM) and the next half of the CPU pins mapping to the middle 10 on the SRAM pins in reverse order.
I suppose I could do the same with the 17 pins on the 1mb SRAM chip, having the first 10 cpu pins mapping to the first and last 5 pins on the SRAM, with the remaining 7 CPU pins mapped to the middle SRAM pins in reverse order, but would that work the same way? I guess I would have to update the CUPL code for that to work?
For Glue Logic, I decided to use a CPLD (ATF1508AS 84PLCC) instead of the 2 GALs you use, and I've read I could use that to decode the remaining 3 CPU address pins (A17-A19), but then where would they go out to, would I need a jumper for those pins, or should I use a 3-to-8 decoder, before the pins go into the CPLD?
I'm not trying to build anything fancy, and maybe one day I'll create a PCB for my project, but for now I just want to be able to: program the CPLD, boot a ROM, connect using vterm through usb, and run BASIC on my homebrew computer. I'm sure that could be done even without mapping the CPU pins 1:1 with SRAM, am I right?
Any response would be appreciated. Thanks.