peripheral not ready during busprobe() - Githubissues

felis / UHS30

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peripheral not ready during busprobe() #43

Open rodan opened 5 years ago

rodan commented 5 years ago

Hi,

my project is based on your code, thus I think maybe you have this problem too.

once every ~20-30 insertions the peripheral returns hrNAK in rHRSL without flipping JSTATUS or KSTATUS in busprobe().

the commit from https://github.com/rodan/lemidi/commit/708f794f17668e2bb660b5c4adfd02ca0be6e831#diff-15d89ed0b4fc434be8c03517072a6efa fixed that problem for me.

if you have the Logic software from Saleae you can check out the problem https://github.com/rodan/lemidi/blob/master/qa/wrong_init.logicdata and after the patch https://github.com/rodan/lemidi/blob/master/qa/fix_wrong_init.logicdata

might help, might not, thought I'd share either way.

cheers, peter

xxxajk commented 5 years ago

I'll take a look soon. Thanks for the find!