Experiment with branchless logic

[fengb]

https://stackoverflow.com/a/5432624

This is leveraging modern CPU designs:

• Branch misses are extremely costly, so no branches!
• CPUs have multiple logical units, so let's maximize parallelism
• Finally select the correct branch at the very end

We will need a strong microp architecture:

• Reads / writes must be linear offsets — MMU and registers must be siblings
• Writes must be u8 only — u16 needs to convert to 2x u8 microps
• Flag changes could be represented as 2x masks
• What about special logic?
  • jump / ret / call / rst
  • EI / DI
  • HALT / STOP

[fengb]

const Offset = magic_numbers(u17) {
    0x0_0000: null,
    0x0_100*: temp, // first microp can store here and be consumed by the second
    0x1_FFF*: registers,
    0x1_****: mmu,
};

const Microp = struct {
    id: enum { add, sub, cp },
    dst: Offset,
    args: [2]Offset,
};

const Op = struct {
    code: u8,
    length: u8,
    durations: [2]u8,
    id: Id,
    microps: [2]Microp,
    flag: enum{}
};