This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
In your description of Going Deeper with Embedded FPGA Platform for Convolutional Neural Network,
you said these: "The FPGA runs VGG16-SVD without reconfiguring its resources"
So the author actually implemented a demo of the whole network using the resources of a single FPGA.
I'm wondering are there any other papers that did this.
Thank you for your comments. Since FPGA'16, many works have been done on acceleraing a whole CNN/RNN network, like another OpenCL-based design in FPGA'16, Caffine in ICCAD'16 and so on.
In your description of Going Deeper with Embedded FPGA Platform for Convolutional Neural Network, you said these: "The FPGA runs VGG16-SVD without reconfiguring its resources"
So the author actually implemented a demo of the whole network using the resources of a single FPGA. I'm wondering are there any other papers that did this.
Thank you!