Fixed RISCV T-Head 1520 CPU identification

[renat-sabitov]

T-Head 1520 is a RISCV CPU. I suggest using isa line to mark the end of processing.

sipeed@lpi4a:~$ cat /proc/cpuinfo 
processor   : 0
hart        : 0
isa     : rv64imafdcvsu
mmu     : sv39
cpu-freq    : 1.848Ghz
cpu-icache  : 64KB
cpu-dcache  : 64KB
cpu-l2cache : 1MB
cpu-tlb     : 1024 4-ways
cpu-cacheline   : 64Bytes
cpu-vector  : 0.7.1

processor   : 1
hart        : 1
isa     : rv64imafdcvsu
mmu     : sv39
cpu-freq    : 1.848Ghz
cpu-icache  : 64KB
cpu-dcache  : 64KB
cpu-l2cache : 1MB
cpu-tlb     : 1024 4-ways
cpu-cacheline   : 64Bytes
cpu-vector  : 0.7.1

processor   : 2
hart        : 2
isa     : rv64imafdcvsu
mmu     : sv39
cpu-freq    : 1.848Ghz
cpu-icache  : 64KB
cpu-dcache  : 64KB
cpu-l2cache : 1MB
cpu-tlb     : 1024 4-ways
cpu-cacheline   : 64Bytes
cpu-vector  : 0.7.1

processor   : 3
hart        : 3
isa     : rv64imafdcvsu
mmu     : sv39
cpu-freq    : 1.848Ghz
cpu-icache  : 64KB
cpu-dcache  : 64KB
cpu-l2cache : 1MB
cpu-tlb     : 1024 4-ways
cpu-cacheline   : 64Bytes
cpu-vector  : 0.7.1

Also, topology doesn't have information for core_id

$ cat /sys/devices/system/cpu/cpu*/topology/core_id
-1
-1
-1
-1

[renat-sabitov]

It's different to #125, but should support VisionFive 2 board as well

[fenrus75]

Patch looks sensible so I'm about to hit the "merge" button. Thank you for your contribution!