Proposed changes for Subaru kernel

[rimwall]

Hi, aside from the changes to .ld and .s, here are the other changes I have done:

In main.c, function main() - wdt pin details assigned manually...

//struct rj_preload *rjp = (struct rj_preload *)RAMJUMP_PRELOAD_META;
struct rj_preload rjp;

rjp.wdt_portH = PB.DR.BYTE.H;
rjp.wdt_portL = PB.DR.BYTE.L;
rjp.wdt_pin = 0x8000;

In platf.h - changed RAMJUMP_PRELOAD_META (although I don't think this is used anymore) and SCI to SCI2

    #if defined(SH7058)
    #include "reg_defines/7055_7058_180nm.h"
    #define RAM_MIN 0xFFFF0000
    #define RAM_MAX     0xFFFFBFFF
    #define RAMJUMP_PRELOAD_META 0xffff3000
    #define NPK_SCI SCI2

In platf_7055.c - changed comms channel to SCI2

/* init SCI2 to continue comms on K line */
static void init_sci(void) {
    SCI2.SCR.BYTE &= 0x2F;  //clear TXIE, RXIE, RE
    SCI2.SCR.BIT.TE = 1;    //enable TX
    return;
}

Any other changes that might be required?

Thanks!

[fenugrec]

In main.c, function main() - wdt pin details assigned manually...

ok. I see a possibly simpler way to do that but not a priority

In platf.h - changed RAMJUMP_PRELOAD_META (although I don't think this is used anymore)

ok

In platf_7055.c - changed comms channel to SCI2

Good find, I thought I was using the NPK_SCI macro to avoid hardcoding SCI1/SCI2 everywhere. I may change this.

Any other changes that might be required?

Adjust timer interval for wdt_tog() functionality

[rimwall]

Adjust timer interval for wdt_tog() functionality

I had assumed that the external circuit would be happy if PB15 toggled faster than 6.6ms, but perhaps it needs to be pretty close to 6.6ms. I've changed this: #define WDT_MAXCNT 4125

So, once the .ld and .s files are done, it should be all ready to try.

[fenugrec]

I had assumed that the external circuit would be happy if PB15 toggled faster than 6.6ms

I'm sure there is some margin, but without knowing for sure, I'd aim for as close as possible. It's easy enough, anyway...