For more context, enabling RISC-V PMU features in linux means that the counters start disabled (via the mcountinhibit CSR), and perf_event_start syscalls are required (either in user code, or through a utility like perf) to access them.
For convenience, disable the PMU features so we can just rdcycle in user-code.
For more context, enabling RISC-V PMU features in linux means that the counters start disabled (via the
mcountinhibitCSR), andperf_event_startsyscalls are required (either in user code, or through a utility likeperf) to access them.For convenience, disable the PMU features so we can just
rdcyclein user-code.