Open geofft opened 5 years ago
Note, Hexagon was added in the Rust compiler: https://github.com/rust-lang/rust/pull/62814 So might me just worth testing the support.
Note, Hexagon was added in the Rust compiler: rust-lang/rust#62814 So might me just worth testing the support.
My work to get hexagon-linux
support for rust is incomplete, I still have to work out changes to libc
and possibly more beyond that.
But the good news is that codegen support for the hexagon processor in general has been present in the compiler for a while. My recent changes were only for making userspace binaries. AFAIK the codegen support that was added by @michaelwu (around https://github.com/rust-lang/rust/pull/41524) should suffice for kernel module development.
Unicore has been removed in torvalds/linux@05119217a9bd199c4b8b12c01f86df09108b109b.
@nickdesaulniers says arc, hexagon, riscv, s390, and sparc are currently broken in ClangBuiltLinux CI (although support exists). I wonder if the breakage would affect Rust.
C-SKY LLVM port got proposed in August 2020.
Convince Linux to drop them << >>
Removing support for some of these architectures from the Linux Kernel is currently being discussed - Old platforms: bring out your dead
Rust supported architectures: https://forge.rust-lang.org/platform-support.html For our purposes, we don't care much about Tier 1 vs. Tier 2, and even Tier 3 support is probably fine.
Another useful reference is Debian's arch status as of February 2018: https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2018-February/001215.html (doesn't include all the arches the kernel supports)
Re ARMv4 - the linked issue implies ARMv4 is only a microcontroller for OS-less use, but arch/arm/mach-gemini/ looks like an actual Linux target for ARMv4. There are also a few ARMv4T boards (i.e., with Thumb support). It looks like LLVM wants to emit BLX instructions which switch to Thumb mode, so unclear if plain ARMv4 will work. (Though forcing it to emit non-Thumb code only doesn't sound like it should be too difficult....)
Re MIPS I - see simias/psx-sdk-rs#1. MIPS I has load delay slots, LLVM's codegen would need to be taught about it. https://github.com/impiaaa/llvm-project seems to have a patch.
Some possible approaches for merging into mainline and dealing with architectures with no LLVM support and no realistic plans (e.g., processors no longer manufactured):