Reminder: missing Z80 state

[floooh]

See here:

https://stardot.org.uk/forums/viewtopic.php?p=350126&sid=b716fab8439114bb3df73a53597215a2#p350126

According to this:

• IFF1: 181
• IFF2: 206
• NMI detected: maybe 135
• IM: 179 and 205

Also: I quickly checked IFF1 and in DI this flips at the second half cycle of the next instruction, while my own guess (231) flips in the middle of the DI instruction (which I think is the better guess, because interrupts are already disabled at the end of DI). Needs more investigation!

Regarding the IM nodes:

• IM 0 (ED 46): 179=>0, 205=>0
• IM 1 (ED 56): 179=>1, 205=>0
• IM 2 (ED 5E): 179=>1, 205=>1

...probably related to the weird 'IM decode table':

im_map = [ '0', '0', '1', '2', '0', '0', '1', '2' ]

PS: complete 179/205 state for all IM instructions:

        179     205 
ED 46:  0       0    (IM 0)
ED 4E:  0       1    (IM 0)
ED 56:  1       0    (IM 1)
ED 5E:  1       1    (IM 2)
ED 66:  0       0    (IM 0)
ED 6E:  0       1    (IM 0)
ED 76:  1       0    (IM 1)
ED 7E:  1       1    (IM 2)

[hoglet67]

FYI, here's a tracing of the curcuitry around the IFF1 and IFF2 latches: z80_iff.pdf

If the timing looks right, I would suggest using 231 for IFF1 and 281 for IFF2.

I've done this tracing to try to resolve the simulation bug described here: https://github.com/hoglet67/Z80Decoder/wiki/NMI-during-EI-Anomaly

[hoglet67]

Here's a slightly updated trace of the circuitry around the IFF1 and IFF2 latches: z80_iff.pdf

I've now included the logic that supresses an interrupt immediately following an EI/DI instruction. This is done immediately after the IFF1 latch.

I would suggest using 1210 for IFF1 and 1239 for IFF2 (these represent the internal latch state)

[floooh]

Hmm if I try node 1210 for IFF1, it only flips in the second half cycle of the next instruction when executing a DI, isn't this too late for the interrupt check? Or is this internally delayed too from the last clock cycle of an instruction?

[hoglet67]

Independent of the state of the IFF1 latch (1210), interrupts are ignored in the instruction following EI/DI. That's done using the signal pla97 (see the right hand side of my schematic).

So node 231 is the result of combining the output of the IFF1 latch (1210) with pla97. That's used I think for deciding whether to actually handle a pending interrupt.

Dave