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fm4dd
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gatemate-riscv
RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga
BSD 3-Clause "New" or "Revised" License
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step23 - Incomplete program read from flash memory
#4
fm4dd
opened
8 months ago
2
step-17 and above - UART speed differs from Verilog encoded baudrate
#3
fm4dd
opened
9 months ago
1
step22 - fails for Gatemate flash programming or flash reading
#2
fm4dd
opened
10 months ago
9
Cologne Chips place&route 'p_r' fails with "Error: Exception Handler called. ExitCode: 112"
#1
fm4dd
opened
10 months ago
2