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fm4dd
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gatemate-riscv
RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga
BSD 3-Clause "New" or "Revised" License
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step19 make vtest on verilator version: erilator 5.020 2024-01-01 rev (Debian 5.020-1) not working
#6
Elektronikus
opened
1 month ago
1
Gatemate toolchain error openFPGALoader "version `GLIBCXX_3.4.32' not found"
#5
fm4dd
opened
1 month ago
0
step23 - Incomplete program read from flash memory
#4
fm4dd
opened
1 year ago
2
step-17 and above - UART speed differs from Verilog encoded baudrate
#3
fm4dd
closed
1 month ago
5
step22 - fails for Gatemate flash programming or flash reading
#2
fm4dd
opened
1 year ago
14
Cologne Chip place&route 'p_r' fails with "Error: Exception Handler called. ExitCode: 112"
#1
fm4dd
opened
1 year ago
4