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fmhess / fmh_gpib_core

GPIB IEEE 488.1 core
Apache License 2.0
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cb7210 ISRx behavior #1

Closed fenugrec closed 6 years ago

fenugrec commented 6 years ago

Hi, more of a question than an issue, but :

in src/frontends/frontend_cb7210p2.vhd : lines 495+ 

when 1 => -- interrupt status 1
        host_data_bus_out_buffer(0) <= DI_interrupt and DI_interrupt_enable;
        host_data_bus_out_buffer(1) <= DO_interrupt and DO_interrupt_enable;
        ...
        DI_interrupt <= DI_interrupt and not DI_interrupt_enable;

Shouldn't the ISR bits reflect the condition of the interrupt regardless of the enable bit ? I'm assuming the cb7210 would behave the same as the NAT7210 / NEC 7210 but I don't have any data on that. NAT7210 docs describe it as "Bits in ISR1 are set and cleared regardless of the status of the Interrupt bits in IMR1."

[...] cb7210.2 user's guide is wrong

I found those comments amusing -- I'm sure they were the result of much head-scratching ! I noticed in some cases the NAT7210 ref manual was correct; but I understand you called this a "cb7210 frontend", not "generic 7210-compatible frontend". Did you notice serious discrepancies between cb7210 behavior and the original NEC part ?

fmhess commented 6 years ago

The interrupt status behavior isn't based on the behavior of the cb7210.2, it's just something that seemed like the right thing to do at the time. It was probably a mistake though, better to keep it simple and compatible. Fixed in commit 8cc5b8a3d687c3663fd4ba5466afdd3c02ad052f