foss-for-synopsys-dwc-arc-processors / embarc_osp

embARC Open Software Platform (OSP) - An embedded software distribution for IoT and other embedded applications for ARC

https://www.embarc.org/

BSD 3-Clause "New" or "Revised" License

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arc_startup.s : SR to AUX_DC_IVDC should wait on FS bit #124

Open yaroslavsadin opened 5 years ago

yaroslavsadin commented 5 years ago

Issue Summary

Type: Bug
Category: Library
Priority: Medium
Release Version: All

Bug

Development Environment

HOST OS All
TOOLCHAIN All
BOARD N/A
ARC CORE All

Bug Description

arc_startup.s line 81-82, here data cache is invalidated by writing to AUX_DC_IVDC and it is immediately enabled by writing to AUX_DC_CTRL. But according to documentation you first should wait on FS bit in DC_CTRL.