haps_hs5x{_smp}: Link to address 0

[abrodkin]

Since FPGA images are now built with DDR mapped to address 0 we need to update the platform configuration: CONFIG_LINUX_LINK_BASE & corresponding .dts{i} files so that built by default images work out of the box on recent FPGA builds.

[pavelvkozlov]

@abrodkin, I'm going to do this. But I have several questions (about compatibility):

• what about dts? We use haps_hs.dts and haps_hs_idu.dts for hs3x, hs5x and hs6x. Is it now time to create separate dts for hs5x?
• to load from address 0 we have to use boot target - loader. It will require changes in buildroot. Should we do this only for hs5x (or for ARCv2 images too, they also move to address 0?)?
• it should be a single approach for FPGA and virtual machines?

[abrodkin]

what about dts? We use haps_hs.dts and haps_hs_idu.dts for hs3x, hs5x and hs6x. Is it now time to create separate dts for hs5x?

@pavelvkozlov since indeed there's a fundamental difference between ARCv2 & ARCv3 platforms (the latter ones use 0-based virtual address as opposed to a "tarditional" 0x8z-based ARCv2 images) I guess there's no other choice other than having separate device tree files. In the end the whole point of the Device Tree is to represent a hardware platform, thus with differently setup hardware for ARCv2 & ARCv3 platforms we need different descriptions. Still what we may do is to use a platform-specific definitions, which will be used as a base address of memory nodes. Alternatively, we may have only final .dts files which will have minimally needed differences, while all the common stuff will be in .dtsi files.

to load from address 0 we have to use boot target - loader. It will require changes in buildroot. Should we do this only for hs5x (or for ARCv2 images too, they also move to address 0?)?

On ARCv2 platforms we'll definitely keep using a plain simple vmlinux, i.e. no loader please there.

it should be a single approach for FPGA and virtual machines?

Preferably so, as it's been our goal for a long time now, to have a single binary which works equally well on FPGA platform, in nSIM & QEMU.

[pavelvkozlov]

Created PR #109

[pavelvkozlov]

Merged. Commit: a3e8772