ARCv3: use 64-bit aux read/write for PCT

[VVIsaev]

ARCv2's high registers (SNAPH/INT_CNTH/COUNTH) are not functional in ARCv3 64-bit where we should use 64-bit low registers.

---

After this change:

# perf stat hackbench
Running in process mode with 10 groups using 40 file descriptors each (== 400 tasks)
Each sender will pass 100 messages of 100 bytes
random: crng init done
Time: 104.460

 Performance counter stats for 'hackbench':

         109475.72 msec task-clock                #    0.995 CPUs utilized
             86639      context-switches          #    0.791 K/sec
                 0      cpu-migrations            #    0.000 K/sec
             19740      page-faults               #    0.180 K/sec
        5465338812      cycles                    #    0.050 GHz
        1429495258      instructions              #    0.26  insn per cycle
         147361994      branches                  #    1.346 M/sec
          41339590      branch-misses             #   28.05% of all branches

     110.046078240 seconds time elapsed

       8.364946000 seconds user
     101.429644000 seconds sys

# cat /proc/interrupts
           CPU0
 16:      13503  ARCv2 core Intc  16  Timer0 (per-cpu-tick)
 20:          0  ARCv2 core Intc  20  ARC perf counters
 24:        285  ARCv2 core Intc  24  ttyS0
# perf record -e cycles -c 100000 hackbench
Couldn't synthesize bpf events.
Running in process mode with 10 groups using 40 file descriptors each (== 400 tasks)
Each sender will pass 100 messages of 100 bytes
Time: 124.189
[ perf record: Woken up 8 times to write data ]
[ perf record: Captured and wrote 1.891 MB perf.data (60740 samples) ]

# cat /proc/interrupts
           CPU0
 16:      27789  ARCv2 core Intc  16  Timer0 (per-cpu-tick)
 20:      60740  ARCv2 core Intc  20  ARC perf counters
 24:        548  ARCv2 core Intc  24  ttyS0

[vineetgarc]

Lets wait for conclusion on spec change before we do anything about it.