ARC port to upstream

[EvgeniiDidin]

This issue contains stages of adding ARC changes to upstream openocd project. First supported board is going to be ARC EM Starter Kit, then HSDK. I outlined the first major stage, which will contain description of the board and basic functionality to initialize the board. The stage may be parted to next parts:

• [ ] Create/initialize target and architecure structures, see #36
• [ ] Adding register types and registers, see #37
• [ ] Jtag operations with registers, see #38
• [ ] Standard board examine, poll, reset, save_context functionality, see #40
• [ ] .tcl files, which describe cpu/board/interface

[EvgeniiDidin]

Upstreaming branch: https://github.com/foss-for-synopsys-dwc-arc-processors/openocd/tree/arc_to_upstream Upstream development branch: https://github.com/foss-for-synopsys-dwc-arc-processors/openocd/tree/didin_upstream_devel