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foss-for-synopsys-dwc-arc-processors / toolchain

Repository containing releases of prebuilt GNU toolchains for DesignWare ARC Processors from Synopsys (available from "releases" link below).
http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx
GNU General Public License v3.0
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openocd errors on hs36 4 cores #164

Open yossi-itach opened 5 years ago

yossi-itach commented 5 years ago

hi, I would like to connect ARC HS36 include 4 cores but I got those errors:
Open On-Chip Debugger 0.9.0-dev-g72f0b9b-dirty (2019-02-10-17:04) Licensed under GNU GPL v2 For bug reports, read http://openocd.sourceforge.net/doc/doxygen/bugs.html adapter speed: 6000 kHz Info : target has l2 cache is enabled Info : target has l2 cache is enabled Info : clock speed 6000 kHz Info : JTAG tap: arc-em.cpu1 tap/device found: 0x100c54b1 (mfg: 0x258, part: 0x00c5, ver: 0x1) Info : JTAG tap: arc-em.cpu0 tap/device found: 0x100454b1 (mfg: 0x258, part: 0x0045, ver: 0x1) Warn : JTAG tap: arc-em.cpu0 UNEXPECTED: 0x100454b1 (mfg: 0x258, part: 0x0045, ver: 0x1) Error: JTAG tap: arc-em.cpu0 expected 1 of 1: 0x100c54b1 (mfg: 0x258, part: 0x00c5, ver: 0x1) Warn : Unexpected idcode after end of chain: 64 0x100054b1 Warn : Unexpected idcode after end of chain: 96 0x100854b1 Error: double-check your JTAG setup (interface, speed, missing TAPs, ...) Error: Trying to use configured scan chain anyway... Error: IR capture error at bit 8, saw 0x0111 not 0x...3 Warn : Bypassing JTAG setup events due to errors Info : JTAG tap: arc-em.cpu1 tap/device found: 0x100c54b1 (mfg: 0x258, part: 0x00c5, ver: 0x1) Info : JTAG tap: arc-em.cpu0 tap/device found: 0x100454b1 (mfg: 0x258, part: 0x0045, ver: 0x1) Warn : JTAG tap: arc-em.cpu0 UNEXPECTED: 0x100454b1 (mfg: 0x258, part: 0x0045, ver: 0x1) Error: JTAG tap: arc-em.cpu0 expected 1 of 1: 0x100c54b1 (mfg: 0x258, part: 0x00c5, ver: 0x1) Warn : Unexpected idcode after end of chain: 64 0x100054b1 Warn : Unexpected idcode after end of chain: 96 0x100854b1 Error: double-check your JTAG setup (interface, speed, missing TAPs, ...) Error: Trying to use configured scan chain anyway... Error: IR capture error at bit 8, saw 0x0111 not 0x...3 Warn : Bypassing JTAG setup events due to errors target state: halted Warn : target is still running! Info : Halt timed out, wake up GDB. Error: timed out while waiting for target halted Runtime Error: cpu/arc/common.tcl:38: in procedure 'reset' called at file "board/gsi_hs36.cfg", line 36 in procedure 'ocd_bouncer' in procedure 'ocd_process_reset' in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 246 in procedure 'arc-em.cpu1' called at file "embedded:startup.tcl", line 310 in procedure 'ocd_bouncer' in procedure 'arc_hs_reset' in procedure 'arc_v2_reset' called at file "cpu/arc/hs.tcl", line 35 in procedure 'arc_common_reset' called at file "cpu/arc/v2.tcl", line 346 in procedure 'halt' called at file "cpu/arc/common.tcl", line 38

It's based on hs38 example file

anthony-kolesov commented 5 years ago 
Warn : Unexpected idcode after end of chain: 64 0x100054b1
Warn : Unexpected idcode after end of chain: 96 0x100854b1

That seems to imply that your target config file describes only two cores? For 4 cores files should look like https://github.com/foss-for-synopsys-dwc-arc-processors/openocd/blob/master/tcl/target/snps_hsdk.cfg

yossi-itach commented 5 years ago

hi, Thanks, now I got those errors but I am able to connect via gdb. What those errors mean? yitach@yitach-lt:/usr/local/share/openocd/scripts$ openocd -f board/gsi_hs36.cfg Open On-Chip Debugger 0.9.0-dev-g72f0b9b-dirty (2019-02-10-17:04) Licensed under GNU GPL v2 For bug reports, read http://openocd.sourceforge.net/doc/doxygen/bugs.html adapter speed: 6000 kHz adapter speed: 100000 kHz Info : target has l2 cache is enabled Info : target has l2 cache is enabled Info : target has l2 cache is enabled Info : target has l2 cache is enabled Info : clock speed 100000 kHz Info : JTAG tap: arc-em.cpu4 tap/device found: 0x2018a863 (mfg: 0x431, part: 0x018a, ver: 0x2) Info : JTAG tap: arc-em.cpu3 tap/device found: 0x2008a863 (mfg: 0x431, part: 0x008a, ver: 0x2) Warn : JTAG tap: arc-em.cpu3 UNEXPECTED: 0x2008a863 (mfg: 0x431, part: 0x008a, ver: 0x2) Error: JTAG tap: arc-em.cpu3 expected 1 of 1: 0x2018a863 (mfg: 0x431, part: 0x018a, ver: 0x2) Info : JTAG tap: arc-em.cpu2 tap/device found: 0x2000a863 (mfg: 0x431, part: 0x000a, ver: 0x2) Warn : JTAG tap: arc-em.cpu2 UNEXPECTED: 0x2000a863 (mfg: 0x431, part: 0x000a, ver: 0x2) Error: JTAG tap: arc-em.cpu2 expected 1 of 1: 0x2018a863 (mfg: 0x431, part: 0x018a, ver: 0x2) Info : JTAG tap: arc-em.cpu1 tap/device found: 0x2010a863 (mfg: 0x431, part: 0x010a, ver: 0x2) Warn : JTAG tap: arc-em.cpu1 UNEXPECTED: 0x2010a863 (mfg: 0x431, part: 0x010a, ver: 0x2) Error: JTAG tap: arc-em.cpu1 expected 1 of 1: 0x200024b1 (mfg: 0x258, part: 0x0002, ver: 0x2) Error: Trying to use configured scan chain anyway... Error: arc-em.cpu4: IR capture error; saw 0x03 not 0x01 Warn : Bypassing JTAG setup events due to errors

anthony-kolesov commented 5 years ago

One things is that you need to set -expected-id arguments in the configuration file to a correct value for your chip. In your case that would be 

-expected-id 0x2018a863
-expected-id 0x2008a863
-expected-id 0x2000a863
-expected-id 0x2010a863

Although this will only deal with first batch of warnings. Not sure why there is an IR-capture error. You have JTAG frequency set at 100MHz, please use something more reasonable, like 6Mhz that were initially set. FWIW FTDI chips can't got faster than 30MHz anyway.