Closed kartikaysharma01 closed 3 years ago
@bessman The issue we faced while oscilloscope testing has come ahead again, just in a bit bigger form this time. We are using phase
and duty_cycle
channel-group config keys. And as we could not figure out how to set configs for 2 channel groups simultaneously, using PWM through cli has become almost impossible. To make things worse, we can not use PulseView as we did for oscilloscope, because it does not support signal generator. I could not find a sigrok UI for signal generators in the first look.
Either way, more clearance is needed on the simultaneous channel-group config issue. Are we doing something wrong or the cli just can not handle such cases. I will look into this issue a bit more and try to see if I can get more clarity on it. Will also try getting a response from the sigrok community on the same. I, personally find it hard to digest that sigrok-cli can not do that. We might be missing something here. It'll be great if you could give this another look too.
I am not marking the PR as open right now as it has not been tested and I have some debug messages which are to be removed from the final code after testing. Let me know if you want me to change the PR status to ready for review.
We might be missing something here. It'll be great if you could give this another look too.
There was an update around August 2020 that addressed this issue but could not be updated on the sigrok wiki for some reason. We can use -c channel_name=<name> key=value -c channel_name=<name> key=value
for simultaneously setting configs for multiple channel groups. This also solves the gain(vdiv) reset problem we faced while testing the oscilloscope driver.
Testing on sigrok-cli
Check ports for pslab device:
sigrok-cli --driver pslab-pwm-generator -l 3 --scan
To see available device options:
sigrok-cli --driver pslab-pwm-generator -l 3 --show
To see available config options on a particular channel group:
sigrok-cli --driver pslab-pwm-generator -l 3 --show -g SQ1
To set trigger phase and duty_cycle, for ex: duty_cycle 50 and phase 90 on channel SQ4
sigrok-cli -d pslab-pwm-generator --set --c channel_group=SQ4:output_duty_cycle=50:phase=90
To generate PWM wave on channels SQ1,SQ2 with duty_cycle=[50,80] and phase=[0,90] with frequency 1m
sigrok-cli -d pslab-pwm-generator -l 5 -c channel_group=SQ1:output_duty_cycle=50:phase=0 -c channel_group=SQ2:output_duty_cycle=80:phase=90 -c output_frequency=1m -C SQ1,SQ2 --continuous
Use log level 5 -l 4
to see debug logs and -l 5
to see all logs
The conflicts will be resolved when the fossasia:pwm
branch is reset to the sigrok master.
To generate PWM wave on channels SQ1,SQ2 with duty_cycle=[50,80] and phase=[0,90] with frequency 1m
sigrok-cli -d pslab-pwm-generator -l 5 -c channel_group=SQ1:output_duty_cycle=50:phase=0 -c channel_group=SQ2:output_duty_cycle=80:phase=90 -c output_frequency=1m -C SQ1,SQ2 --continuous
With this example, I get:
[...]
sr: [00:00.022601] pslab-pwm-generator: Generate PWM Wave
sr: [00:00.022635] pslab-pwm-generator: Calculating wavelength, given frequency = 1.000000
sr: [00:00.022659] pslab-pwm-generator: Prescaler out of range, could not calculate wavelength
sr: [00:00.022683] pslab-pwm-generator: Error generating wave: -3
[...]
It seems that output_frequency=1m
is interpreted as 1 Hz instead of 1 MHz. The lowest frequency the PSLab's PWM generator can output is 4 Hz. So, this is correct behavior, but I was a little surprised when the example failed ;)
As far as I can tell this is 1:1 with pslab-python. Good work, merging.
Description There are no known bugs in the code. The coding style to be followed can be found here. The code can be tested by using these commands on sigrok-cli.
Issue Resolves #9
Status Ready for review