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fpga-open-speech-tools / simulink_models

Simulink models for speech and audio processing
MIT License
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delay and sum beamformer #21

Closed tvannoy closed 4 years ago

tvannoy commented 4 years ago

First working version of the delay and sum beamformer model. HDL code has been generated for the model.

It has an overall latency of 2 samples at 48 kHz (4096 cycles at the 98.304 MHz system clock). Some resource usage optimization might be necessary in the future, but we can wait on that until we see resource usage in an actual Quartus project.

The init scripts aren't super clean, so suggestions on cleaning those up will be appreciated. This is very much a "get it working" sort of situation.

tvannoy commented 4 years ago

Perhaps I should rename the MATLAB Function blocks in the Simulink model so the generate HDL files have more descriptive file and entity names.