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fpgadeveloper / fpga-drive-aximm-pcie

Example designs for FPGA Drive FMC
http://fpgadrive.com
MIT License
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[ZCU106] Cannot detect the SSD #19

Closed CaglayanDokme closed 2 years ago

CaglayanDokme commented 2 years ago

I followed the steps provided in the documentation and successfully generated the image files for the ZCU106 development board. The board boots up without any problem. But, somehow, I can't detect the SSDs.

I faced the same problem with both of the following designs created for ZCU106

The output of the lspci command for HPC0 Dual configuration is as follows:

0000:00:00.0 PCI bridge Xilinx Corporation Device 9134 0001:00:00.0 PCI bridge Xilinx Corporation Device 9134

The SSD part is one of the tested ones by Opsero: Samsung 970 EVO 500GB

fpgadeveloper commented 2 years ago

Hi, Please try downloading the prebuilt boot files and testing them on your hardware. They have been tested on our hardware and with the same SSDs. Dual design: https://opsero.com/downloads/boot/2020-2/zcu106_hpc0_dual-petalinux-2020-2.tar.gz Single design: https://opsero.com/downloads/boot/2020-2/zcu106_hpc0-petalinux-2020-2.tar.gz Please use the Opsero contact form for more support on this. Jeff

CaglayanDokme commented 2 years ago

Hi Jeff, Thanks for the quick reply. The prebuilt image works fine. I've got a few questions for you.

I tried to regenerate the Vivado and PetaLinux projects using the scripts you've provided. The Vivado version I use is 2018.3 and the tickle script states that it should be 2018.2. So, I upgraded the tickle file by just modifying the version_required variable. Would it cause a big difference between final products? I guess that the PetaLinux version also differs. Thus, I would be appreciated if you could tell me whether it would be a problem or not.

UPDATE

Using the tickle file of version 2020.2, I had just generated a .bit file in Vivado 2018.3 and packaged it with a proper FSBL and U-Boot binary. Then, I tried to boot the board using the BOOT.bin of mine, and the prebuilt image.ub you've provided. Unfortunately, the board didn't boot. (Stalled after the Xilinx DPDMA engine is probed.) I was actually expecting a successful boot. What would be the reason for the failure?

UPDATE 2

I think I've got some good news. This morning I tried to boot the system with a different configuration which includes the BOOT.bin you'd provided and the kernel image(device tree and rootfs also) I generated. Luckily, the design works well. I managed to detect both of the SSDs with the lspci utility. Therefore, I'm pretty sure that the problem is related to the generation of .bit file.

Thanks.

fpgadeveloper commented 2 years ago

Contact me through the Opsero contact form.