fpgadeveloper / zedboard-axi-dma

Demonstration of the AXI DMA engine on the ZedBoard
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build script update #1

Open bigbrett opened 7 years ago

bigbrett commented 7 years ago

Hi Jeff,

Looks like Xilinx must have changed the name of the PS reset block in the netlist. In order for this project to successfully build, you need to replace all instances of *rst_ps7_0_100M* with *rst_processing_system7_0_100M* in Vivado/src/bd/design_1.tcl.

fpgadeveloper commented 7 years ago

Hi Brett,

I think it should be the other way around Brett. Are you using Vivado 2016.3? It should build fine with 2016.3.