fpgasystems / fpga-network-stack

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
BSD 3-Clause "New" or "Revised" License
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synthesis error : "tcp_ip_top.v" instantiates a mismathed version of "network_stack.v"? #27

Open torukskywalker opened 2 years ago

torukskywalker commented 2 years ago

Not sure if some directories or files are updated to different versions causing this error. But we found in the *project.tcl , it sets the src_dir to "rtl", but there is no "rtl", only "hdl" is available. After fix the src_dir and some minor error (like no NUM_TCP_CHANNELS defined in network_stack.v) we started to do synthesis, but if failed with errors like below, we checked the network_stack.v and found the tcp_ip_top.v instantiates a "network_stack" with different in/out ports.

[Synth 8-2916] unconnected interface port 's_axil' ["/mnt/projects/fpga-network-stack-master/hdl/ultraplus/vcu118/tcp_ip_top.v":369] [Synth 8-6156] failed synthesizing module 'network_stack' ["/mnt/projects/fpga-network-stack-master/hdl/common/network_stack.sv":36]