Closed srmarkovic closed 2 months ago
Hello! Just a quick (stupid) question: Did you think of enabling hard limits? ($21 - Hard limits, boolean). I think they are dsiabled by default...
Cheers Raphael
Hello! Just a quick (stupid) question: Did you think of enabling hard limits? ($21 - Hard limits, boolean). I think they are dsiabled by default...
Cheers Raphael They are enabled.
When I don't use #define ENABLE_RAMPS_HW_LIMITS everything works and it is detected when limit switch is active (show RUN (x), RUN(y), RUN(Z) according to axe limit activated in BCNC or when it is not in run state and I ask $$ ) but there is no Alarm and machine continues to work. When I use #define ENABLE_RAMPS_HW_LIMITS there is alarm and machine stop when limit is activated but it loses steps jogging or stop or uncontrolled continue to go in one direction and do all kind of weird things and it is as it has no power.
I made custom board for Atmega2560 grbl controller for my hobby machine. I used pinouts shown in the bottom picture. It worked fine with grbl/Mega. I need 4th axe so I tried your 5X grbl. It works fine, does homing, shows when limit switches (inductive with isolated 24V psu, shielded cable optocouplers and smit trigger circuits working beautiful) are triggered but doesn't halt doesn't invoke Alarm. I tried with "#define ENABLE_RAMPS_HW_LIMITS " and it cant send pulses it stucks or does something strange. Please help me. Where did I go wrong. Thank you. Here is my cpu_map.h
/ I made custom board for grbl. I used next pins : Limit Z 12 Limit Y 11 Limit X 10 Mist 9 Flood 8 Spindle PWM 7
Spindle enabled 6 Spindle direction 5 Pulse X 24
Pulse Y 25 Pulse Z 26 Pulse A 27 Pulse B 28 Pulse C 29 Direction X 30 Direction Y 31 Direction Z 32 Direction A 33 Direction B 34 Direction C 35 Limit C 51 Limit B 52 Limit A 53 Probe A15 Safety door A11 Start A10 Hold A9 Reset A8
/ /* cpu_map.h - CPU and pin mapping configuration file Part of Grbl
Copyright (c) 2017-2022 Gauthier Briere Copyright (c) 2012-2016 Sungeun K. Jeon for Gnea Research LLC
Grbl is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.
Grbl is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with Grbl. If not, see http://www.gnu.org/licenses/. */
/ The cpu_map.h files serve as a central pin mapping selection file for different processor types or alternative pin layouts. This version of Grbl supports only the Arduino Mega2560. /
ifndef cpu_map_h
define cpu_map_h
ifdef CPU_MAP_2560_RAMPS_BOARD // (Arduino Mega 2560) with Ramps 1.4 Board
include "nuts_bolts.h"
// Serial port interrupt vectors
define SERIAL_RX USART0_RX_vect
define SERIAL_UDRE USART0_UDRE_vect
// Define ports and pins
define DDR(port) DDR##port
define _DDR(port) DDR(port)
define PORT(port) PORT##port
define _PORT(port) PORT(port)
define PIN(pin) PIN##pin
define _PIN(pin) PIN(pin)
// Define step pulse output pins. ISPRAVLJENO _____
define STEP_PORT_0 A
define STEP_PORT_1 A
define STEP_PORT_2 A
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define STEP_BIT_0 2 // X Step - Pin 24
define STEP_BIT_1 3 // Y Step - Pin 25
define STEP_BIT_2 4 // Z Step - Pin 26
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define _STEP_BIT(i) STEPBIT##i
define STEP_BIT(i) _STEP_BIT(i)
define STEP_DDR(i) _DDR(STEPPORT##i)
define _STEP_PORT(i) _PORT(STEPPORT##i)
define STEP_PORT(i) _STEP_PORT(i)
define STEP_PIN(i) _PIN(STEPPORT##i)
// Define step direction output pins. ISPRAVLJENO ____
define DIRECTION_PORT_0 C
define DIRECTION_PORT_1 C
define DIRECTION_PORT_2 C
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define DIRECTION_BIT_0 7 // X Dir - Pin 30
define DIRECTION_BIT_1 6 // Y Dir - Pin 31
define DIRECTION_BIT_2 5 // Z Dir - Pin 32
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define _DIRECTION_BIT(i) DIRECTIONBIT##i
define DIRECTION_BIT(i) _DIRECTION_BIT(i)
define DIRECTION_DDR(i) _DDR(DIRECTIONPORT##i)
define _DIRECTION_PORT(i) _PORT(DIRECTIONPORT##i)
define DIRECTION_PORT(i) _DIRECTION_PORT(i)
define DIRECTION_PIN(i) _PIN(DIRECTIONPORT##i)
// Define stepper driver enable/disable output pin. ISPRAVLJENO __
define STEPPER_DISABLE_PORT_0 B
define STEPPER_DISABLE_PORT_1 B
define STEPPER_DISABLE_PORT_2 B
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define STEPPER_DISABLE_BIT_0 7 // X Enable - Pin 13
define STEPPER_DISABLE_BIT_1 7 // Y Enable - Pin 13
define STEPPER_DISABLE_BIT_2 7 // Z Enable - Pin 13
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define STEPPER_DISABLE_BIT(i) STEPPER_DISABLEBIT##i
define STEPPER_DISABLE_DDR(i) _DDR(STEPPER_DISABLEPORT##i)
define STEPPER_DISABLE_PORT(i) _PORT(STEPPER_DISABLEPORT##i)
define STEPPER_DISABLE_PIN(i) _PIN(STEPPER_DISABLEPORT##i)
// Define homing/hard limit switch input pins and limit interrupt vectors.
define MIN_LIMIT_PORT_0 B
define MIN_LIMIT_PORT_1 B
define MIN_LIMIT_PORT_2 B
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define MIN_LIMIT_BIT_0 4 // X Limit Min - Pin D3
define MIN_LIMIT_BIT_1 5 // Y Limit Min - Pin D14
define MIN_LIMIT_BIT_2 6 // Z Limit Min - Pin D18
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define _MIN_LIMIT_BIT(i) MIN_LIMITBIT##i
define MIN_LIMIT_BIT(i) _MIN_LIMIT_BIT(i)
define MIN_LIMIT_DDR(i) _DDR(MIN_LIMITPORT##i)
define MIN_LIMIT_PORT(i) _PORT(MIN_LIMITPORT##i)
define MIN_LIMIT_PIN(i) _PIN(MIN_LIMITPORT##i)
define MAX_LIMIT_PORT_0 B
define MAX_LIMIT_PORT_1 B
define MAX_LIMIT_PORT_2 B
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define MAX_LIMIT_BIT_0 4 // X Limit Max - Pin D2
define MAX_LIMIT_BIT_1 5 // Y Limit Max - Pin D15
define MAX_LIMIT_BIT_2 6 // Z Limit Max - Pin D19
if N_AXIS > 3
endif
if N_AXIS > 4
endif
if N_AXIS > 5
endif
define _MAX_LIMIT_BIT(i) MAX_LIMITBIT##i
define MAX_LIMIT_BIT(i) _MAX_LIMIT_BIT(i)
define MAX_LIMIT_DDR(i) _DDR(MAX_LIMITPORT##i)
define MAX_LIMIT_PORT(i) _PORT(MAX_LIMITPORT##i)
define MAX_LIMIT_PIN(i) _PIN(MAX_LIMITPORT##i)
// Enable Hardware limit support for RAMPS without using interrupt... // Warning! bouncing switches can cause a state check like this to misread the pin. // When hard limits are triggered, they should be 100% reliable. // The RAMPS_HW_LIMIT is implemented inside the stepper driver interrupt. Depending of your // hardware, this can affect the max speed possibility of movments // Disabled by default for performance optimization, uncomment to enable. //#define ENABLE_RAMPS_HW_LIMITS
// Define spindle enable and spindle direction output pins. ISPRAVLJENO ___
define SPINDLE_ENABLE_DDR DDRH
define SPINDLE_ENABLE_PORT PORTH
define SPINDLE_ENABLE_BIT 3 // MEGA2560 Digital Pin 4 - Ramps 1.4 Servo 4 Signal pin (D4)
define SPINDLE_DIRECTION_DDR DDRE
define SPINDLE_DIRECTION_PORT PORTE
define SPINDLE_DIRECTION_BIT 3 // MEGA2560 Digital Pin 5 - Ramps 1.4 Servo 3 Signal pin (D5)
// Define flood and mist coolant enable output pins. ISPRAVLJENO___
define COOLANT_FLOOD_DDR DDRH
define COOLANT_FLOOD_PORT PORTH
define COOLANT_FLOOD_BIT 5 // MEGA2560 Digital Pin 8 - Ramps 1.4 12v output
define COOLANT_MIST_DDR DDRH
define COOLANT_MIST_PORT PORTH
define COOLANT_MIST_BIT 6 // MEGA2560 Digital Pin 9 - Ramps 1.4 12v output
// Define M62 - M65 Digital Output Control ports // D16 D17 D23 D25
define DIGITAL_OUTPUT_DDR_0 DDRH
define DIGITAL_OUTPUT_PORT_0 PORTH
define DIGITAL_OUTPUT_BIT_0 1 // MEGA2560 Digital Pin 16 - Ramps 1.4 AUX-4 D16
define DIGITAL_OUTPUT_DDR_1 DDRH
define DIGITAL_OUTPUT_PORT_1 PORTH
define DIGITAL_OUTPUT_BIT_1 0 // MEGA2560 Digital Pin 17 - Ramps 1.4 AUX-4 D17
define DIGITAL_OUTPUT_DDR_2 DDRA
define DIGITAL_OUTPUT_PORT_2 PORTA
define DIGITAL_OUTPUT_BIT_2 1 // MEGA2560 Digital Pin 23 - Ramps 1.4 AUX-4 D23
define DIGITAL_OUTPUT_DDR_3 DDRA
define DIGITAL_OUTPUT_PORT_3 PORTA
define DIGITAL_OUTPUT_BIT_3 3 // MEGA2560 Digital Pin 23 - Ramps 1.4 AUX-4 D25
// Define user-control CONTROLs (cycle start, reset, feed hold) input pins. // NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
define CONTROL_DDR DDRK
define CONTROL_PIN PINK
define CONTROL_PORT PORTK
define CONTROL_RESET_BIT 0 // Pin A9 - RAMPS Aux 2 Port
define CONTROL_FEED_HOLD_BIT 1 // Pin A10 - RAMPS Aux 2 Port
define CONTROL_CYCLE_START_BIT 2 // Pin A11 - RAMPS Aux 2 Port
define CONTROL_SAFETY_DOOR_BIT 3 // Pin A12 - RAMPS Aux 2 Port
define CONTROL_INT PCIE2 // Pin change interrupt enable pin
define CONTROL_INT_vect PCINT2_vect
define CONTROL_PCMSK PCMSK2 // Pin change interrupt register
define CONTROL_MASK ((1<<CONTROL_RESET_BIT)|(1<<CONTROL_FEED_HOLD_BIT)|(1<<CONTROL_CYCLE_START_BIT)|(1<<CONTROL_SAFETY_DOOR_BIT))
// Define probe switch input pin.
define PROBE_DDR DDRK
define PROBE_PIN PINK
define PROBE_PORT PORTK
define PROBE_BIT 7 // MEGA2560 Analog Pin 15
define PROBE_MASK (1<<PROBE_BIT)
ifdef USE_ANALOG_INPUT
endif
ifdef USE_DIGITAL_INPUT
endif
//------------------------------------------------------------------------------------------------------- // Advanced Configuration Below You should not need to touch these variables //-------------------------------------------------------------------------------------------------------
// Spindle PWM configuration : // list of timers in Arduino Mega 2560 // TIMER0 (controls pin D13, D4); => Timer0 is used by stepper.c // TIMER1 (controls pin D12, D11); => Timer1 is used by stepper.c // TIMER2 (controls pin D10, D9); => Timer2 is used by analog output or spindle PWM on D9 // TIMER3 (controls pin D5, D3, D2); => Timer3 is used by sleep.c // TIMER4 (controls pin D8, D7, D6); => Timer4 is used by analog output or spindle PWM on D8 or D6 // TIMER5 (controls pin D46, D45, D44); => Timer5 is unused by grbl-Mega-5X. It's possible to add // PWM capability to ports D44 (RAMPS AUX-2), D45 (RAMPS AUX-4). // D46 is not available for PWM because it's used by Z step. // Arduino pin number and the corresponding register for controlling the duty cycle : // Pin Register // 2 OCR3B // 3 OCR3C // 4 OCR4C // 5 OCR3A // 6 OCR4A // 7 OCR4B // 8 OCR4C // 9 OCR2B // 10 OCR2A // 11 OCR1A // 12 OCR1B // 13 OCR0A // 44 OCR5C // 45 OCR5B // 46 OCR5A
if defined(SPINDLE_PWM_ON_D7)
elif defined (SPINDLE_PWM_ON_D6)
elif defined (SPINDLE_PWM_ON_D9)
else
endif
ifdef SEPARATE_SPINDLE_LASER_PIN
endif // SEPARATE_SPINDLE_LASER_PIN
ifdef USE_OUTPUT_PWM
endif // USE_OUTPUT_PWM
endif // CPU_MAP_2560_RAMPS_BOARD
endif