frantgn90 / apa-prefetcher

First of two projects for APA (Advanced Processor Architecture) course of MIRI master at UPC. We are encouraged to develop the best prefetcher that we can taking into account some restrictions and assumptions.
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Avoiding congestion stopping prefetching #7

Open frantgn90 opened 7 years ago

frantgn90 commented 7 years ago

One important thing that SPP does is that in addition to throttling when Pd falls below the Tp, SPP also stops prefetching if there are not enough L2 read queue resources. Therefore, SPP does not issue prefetches when the number of empty L2 read queue entry becomes less than the number of L1 MSHR.

The first problem is that we have not access to L1 MSHR, so we have to try to apply another approach. Suggestions?

My problem is that I've not a clear idea about difference between L1 MSHR and L2 read queue because the first one holds the misses of L1 and these ones will go to the read buffer to L2, so when the movement is done?? Why we want two buffers??

aztinki commented 7 years ago

L1 cache misses and L2 read requests are the same

aztinki commented 7 years ago

So since we have L2 read queue we can use it

aztinki commented 7 years ago

We dont need two buffers

aztinki commented 7 years ago

I am sorry, I meant that both L1 misses and L2 read requests are inserted in the same queue for this Prefetching environment, I read the documentation. We will have to set a threshold ourselves, since we cannot see the L1 mshrs. Maybe tune it for what works best for our traces and spec traces

frantgn90 commented 7 years ago

I set the threshold to 3/4 of the size of the L2 read requests buffer