Closed 1div0 closed 10 months ago
Duplicates #308 (hence 0 changes)
Thank you anyway.
Is there any plan to add optimizations for AArch64 on Apple Silicon, Amazon Graviton or Ampere Altra?
Or eventually RISC-V V extensions in the future?
No plans for RISC-V.
The encoder runs very well on aarch64, especially Apple Silicon, thanks to SIMD everywhere.
We started experimenting with native optimization for ARM in VVdeC (version 2.1.0), but it seems it quite hard to beat SIMD everywhere. I hope it'll get better as we learn NEON. Since we are still taking care of VVdeC in that regard, I don't see any similar work happening in VVenC this year.
While experimenting with build on AArch64 I have found a small mistake causing build failure.
/usr/src/github.com/1div0/vvenc/source/Lib/EncoderLib/EncAdaptiveLoopFilter.cpp:6293:24: error: use of undeclared identifier 'read_x86_extension_flags' const bool useSimd = read_x86_extension_flags() > SCALAR; ^ /usr/src/github.com/1div0/vvenc/source/Lib/EncoderLib/EncAdaptiveLoopFilter.cpp:6293:53: error: use of undeclared identifier 'SCALAR' const bool useSimd = read_x86_extension_flags() > SCALAR; ^ 2 errors generated. source/Lib/vvenc/CMakeFiles/vvenc.dir/build.make:649: recipe for target 'source/Lib/vvenc/CMakeFiles/vvenc.dir/__/EncoderLib/EncAdaptiveLoopFilter.cpp.o' failed
So here is the fix. Please review. Thanks.