Closed th-otto closed 1 year ago
PCI functions in the XBIOS were introduced with PCI-BIOS v2, in the previous PCI-BIOS version (1.12 and 1.13) parameters were passed in registers (D0, D1, A0 and A1). I didn't find any documentation about PCI-BIOS v2 besides what is present in tos.hyp. The only implementation of PCI-BIOS v2 I know was done by Didier Mequignon for the CTPCI and the FireBee, in that implementation the bytes function's parameters defined in PCI-BIOS v1.1x were changed to words.
For the first example linked in your post (special_cycle function) here is the function prototype done by Didier:
There is an program which called XPCI. This use the XBIOS function from 300 to 342 for the PCI-BIOS like it was planed for the version 2.0. From this I make the bindings. This use the normal PCI cookie.
Maybe I'm wrong with them. I not good in assembler.
I think it is just a bad choice for the parameter types in the documentation, or relies on special binding functions for Pure-C that pushes the correct (word-sized) parameters to the stack. Look for example at Bconout(), where the character is declared as int16_t, although it can only be in range 0-255.
There is an program which called XPCI. This use the XBIOS function from 300 to 342 for the PCI-BIOS like it was planed for the version 2.0. From this I make the bindings. This use the normal PCI cookie.
Maybe I'm wrong with them. I not good in assembler.
I took a look on the sources in that package. Where a BYTE size parameter was used in PCI-BIOS v 1.1x in that code a WORD is moved from the stack after a XBIOS trap is done.
Example: (a2 points to the stack where the parameters are)
special.cycle: ; rep%=Xbios(313,W:bus|,L:data%) move.w 2(a2),d0 ;UBYTE bus move.l 4(a2),d1 ;ULONG data jsr (a3) ;go PCI Fonction rts
After seeing Didier's code and XPCI package code it seems clear that a WORD should be placed in the stack instead of a BYTE in those XBIOS bindings.
EDIT: I don't know why the code pasted is not formatted correctly in the message
When I think about that it looks like that I use the docu form the PCI-BIOS and there is in special_cycle a byte for bus
Like I say I have not really experience with that. Please change it.
I have a little a problem with Didier's code, because he change the versionsnumber from the cookie to four, whitout any document.
In some example bindings for PCI xbios calls, a byte is pushed to the stack. As we know that will actually decrement the SP by 2. Consequently, the stack offset correction is also wrong (for example in https://github.com/freemint/tos.hyp/blob/37618c7522ce482b695647c6f89799261d41df96/xbios/pci_bios/special_cycle.ui#L50-L54) Can someone verify at which offset on the stack the PCI bios actually expects such parameters?
Edit: at least some other examples are definitely wrong: https://github.com/freemint/tos.hyp/blob/37618c7522ce482b695647c6f89799261d41df96/xbios/pci_bios/read_config_byte.ui#L60-L65
addq.l #11 is not valid.